Johnson Service Group has immediate career opportunities for ASIC Design Verification Engineers
- 5+ years of industry experience and background in RTL-based (Verilog and System Verilog) high speed digital design for SoCs. (Direct experience with SSD controller chips is a plus)PCIe based controller chip level design experience is a must.
- Familiar with verification methodologies and able to debug RTL issues.
- Substantial programming experience in C, C++, Verilog, System Verilog
- Able to create self-checking mini test-benches for the design blocks.
- Experience using Revision Control tools - Subversion, RCS, CVS, or Perforce
- Working knowledge of Linux environment and scripting languages such as Perl or Python
- Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, or Verdi
- The ideal candidate will also be familiar with all stages in the ASIC design flow including emulation, prototyping, timing analysis, bring up, lab debug, and ATE test development
- Good communication skills able to read/write design specifications, read/write test plans and conduct peer reviews and the ability to work well in a multisite
- A good understanding of advanced verification methodologies: metrics and plan driven verification and have hands-on experience with UVM / OVM / ERM
- Expert-level knowledge of test-bench development using Object-Orientation System Verilog
- Hands-on experience and expert-level knowledge of advanced verification methodologies (OVM / UVM System Verilog)
- Expert level knowledge of coverage driven verification; coverage model design and implementation using HVLs
Location: Santa Clara, CA
Length of Contract: 4+ months
Please contact Manisha at 949-415-5476 or email at email@example.com for immediate consideration!!!!!!