* Develop testbenches in UVM, SystemVerilog, Verilog, C, C++ and other languages.
* Write test plans for digital signal processing logic blocks, control logic blocks, general
purpose processor cores and other digital logic devices.
* Write and debug tests for a complex media processor in UVM, SystemVerilog,
Verilog, C, C++, Perl, Python and other languages
* Develop verification tools
* Perform coverage analysis using CAD tools.
* Perform System Level verification of Ambarella's Video Input block as well as
* Perform Block Verification of Ambarella's very complex CABAC compression block.
Minimum Requirement: MSEE/CE
To apply, please submit resume with subject: JOB# 131121 to firstname.lastname@example.org
As an Equal Opportunity/Affirmative Action Employer, Ambarella actively recruits qualified applicants without regard to race, color, national origin, sex, physical disability, or veteran status.