Primary Responsibilities:
Architecture and implementation of verification methodology and infrastructure for module level & chip level design verification
Develop system level test strategy, test-plans and drive it to closure
Qualifications:
BS/MS EE/CS
5+ years in ASIC verification - from concept through production
Solid background in design verification of multi-processor based ASIC's
Strong system level verification & debugging skills
Experience implementing coverage driven verification test benches
Fluency in C, HDL's - System Verilog & OVM / UVM
Strong shell scripting - Python/Perl is a plus
H.264 is a plus
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