The future of semiconductors lies in the third dimension. You’ve heard of 3D-ICs, “More than Moore,” silicon interposers, TSVs, wafer stacking – Tezzaron lives and works in that third dimension. You’ll be part of a multi-disciplinary team, designing and implementing 3D-ICs and 2.5D systems in deep sub-micron processes.
Tezzaron is a world leader in three-dimensional integrated circuits. We collaborate with semiconductor manufacturers, research groups, and government agencies to create prototypes and commercial devices. We’ve produced memories, processors, sensors, and other applications in advanced 3D-IC architectures. We offer an aggressive financial compensation program, equity participation, and outstanding benefits and 401k programs.
Here's a unique opportunity to join a rapidly expanding company offering fantastic career and skills development opportunities. Work on challenging designs in leading-edge CMOS technology nodes (down to 14 nm), collaborate with an experienced digital IC team, and work with EDA vendors to explore and aid in R&D of the latest in 3D-IC technology.
You will perform net-list to GDSII implementation of digital IC designs at the macro, core, or top level. You will handle all aspects of SOC implementation from logic synthesis to foundry tape-out, including floor-planning, partitioning, place & route (P&R), timing optimization, test, clock tree insertion, and static timing analysis (STA). You will also be responsible for power grid analysis, signal integrity analysis, and physical, electrical, and formal verification.