The future of semiconductors lies in the third dimension. You’ve heard of 3D-ICs, “More than Moore,” silicon interposers, TSVs, wafer stacking – Tezzaron lives and works in that third dimension. You’ll be part of a multi-disciplinary team, designing and implementing 3D-ICs and 2.5D systems in deep sub-micron processes.
Tezzaron is the world leader in three-dimensional integrated circuits. We develop high performance 3D RAMs and digital hubs and switches; we also offer design and assembly solutions in the 3D and 2.5D space, creating both prototypes and commercial devices. Our customers are FPGA, networking, and server businesses; semiconductor manufacturers; research groups; and government agencies.
With a completely revolutionary approach to 3D, Tezzaron is doing the impossible. Come join us in developing advanced 3D-IC architectures, including memory fabric SoCs with the highest density, lowest latencies, highest bandwidth, and lowest power ever!
Tezzaron engineers enjoy unlimited career growth opportunities and an aggressive compensation package including paid overtime, excellent benefits, a 401k plan, and pre-IPO stock options.
Here's a unique opportunity to join a rapidly expanding company offering fantastic career and skills development opportunities. Work on challenging designs in leading-edge CMOS technology nodes (down to 14 nm), collaborate with an experienced digital IC team, and work with EDA vendors to explore and aid in R&D of the latest in 3D-IC technology.
You will perform net-list to GDSII implementation of digital IC designs at the macro, core, or top level. You will handle all aspects of SOC implementation from logic synthesis to foundry tape-out, including floor-planning, partitioning, place & route (P&R), timing optimization, test, clock tree insertion, and static timing analysis (STA). You will also be responsible for power grid analysis, signal integrity analysis, and physical, electrical, and formal verification.