Overview
On Site
$55 - $60
Accepts corp to corp applications
Contract - W2
Contract - Independent
100% Travel
Unable to Provide Sponsorship
Skills
FPGA
ASIC
Job Details
Job Title: FPGA Design Verification Engineer/Technical Lead II - VLSI
Location: Santa Clara, CA
Experience : 10+ Experience
Required Skills
Strong understanding of FPGA, ASIC, RTL design principles, and architectures.
Proficiency in SystemVerilog and UVM verification methodology.
Hands-on experience with Linux operating systems.
Proficiency with verification tools such as QuestaSim, Synopsys VCS, HAPS, etc.
Knowledge of high-speed I/O design and protocols (PCIe, I2C, SPI, etc.).
Experience using lab debugging tools: logic analyzer, oscilloscope, JTAG.
Excellent debugging and problem-solving skills.
Strong communication and collaboration abilities.
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