Overview
On Site
$50 - $60
Contract - W2
Contract - 12 Month(s)
Skills
Custom analog/mixed-signal IC layout
Cadence Virtuoso
DRC
LVS
PEX
Cadence Quantus
Job Details
- Perform custom analog/mixed-signal IC layout in Cadence Virtuoso for circuits such as ADCs, Op-Amps, Comparators, and Switch Capacitor designs.
- Execute layout verification including DRC (Design Rule Check) and LVS (Layout vs. Schematic) to ensure design compliance.
- Conduct Parasitic Extraction (PEX) using Cadence Quantus, ensuring post-layout accuracy for performance verification.
- Collaborate closely with circuit design engineers to optimize layout for performance, area, and reliability.
- Work within the 22nm FDX SOI process node, adhering to foundry design rules and guidelines.
- Provide layout support and technical documentation throughout the design cycle.
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