Validation Engineer

Validation Engineer

Hybrid, must be able to work onsite to start for training then will by Hybrid. schedule will depend on need to be onsite following training.

Job details:

Develops pre-Silicon functional validation tests to verify system will meet design requirements.

Creates test plans for Pre and post Si validation, defining and running system simulation models, and finding and implementing corrective measures for failing tests.

Analyzes and uses results to modify testing. In this position, your responsibility will include but not be limited to: - Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, running functional simulations, and debugging failures.

Maintaining and enhancing the validation infrastructure by creating new tools to support validation.

Working in a very team-oriented environment and interacting with engineers from other design disciplines.

Required Skills: - Possess a Bachelor's in Electrical Engineering and/or Computer Engineering and/or Computer Science with 4+ years of experience in the area of either firmware design or verification. - 2+ years of pre-si verification work using a validation methodology such as Simics.