Digital Engineer 3 - RTL Design

Aerospace, FPGA, IP, VHDL, Verilog, Xilinx, libero, digital engineering, RTG4, columniation
Contract W2, 12 Months
$90 - $110
Travel required to 10%.

Job Description

Amarx Search, Inc.    

12+ month W-2 contract position in Manhattan Beach, CA
Pay: up to $110 per hour based on experience
Position ID: 2288

An excellent position with a large international defense / aerospace company

* Digital Engineer 3 - RTL Design *

Please apply ONLY if you have strong RTL design skills (VHDL or Verilog)

You must currently be a United States Citizen (government related work)

Visa sponsorship is not available for this position

We can ONLY consider your application if you have:

1: Key tool knowledge: Xilinx Vivado for Kintex/US or Microchip Libero for RTG4 a major plus
2: Key technical skills: recent experience in RTL design (VHDL or Verilog)
3: Recent experience in implementing RTL designs when given requirements.
4: Work experience with digital columniation a major plus.

We are looking for an experienced RTL designer (VHDL or Verilog) for FPGA and digital ASIC designs

DESIRED (not required) SKILLS:
:: Familiar with Xilinx Vivado or Microsemi Libero
:: Experience in scripting languages: Make, Perl, Python, shell scripts, etc.
:: Experience in Revision Control Systems: Subversion (SVN), CVS, Git.
:: Work experience writing architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).
:: Work experience performing RTL synthesis.
:: Work experience performing Static Timing Analysis and correcting timing violations.
:: Work experience creating a self-checking simulation test benches from scratch.

Duties and Responsibilities
== HDL coding, logical equivalency checking, static timing analysis, CDC, linting
== Determine architecture design, logic design, and system simulation.
== Define module interfaces/formats for simulation.
== Prepare detailed design documentation
== Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use.
== Integration of third-party IP
== Create self-checking and reusable test benches from scratch, utilizing Object Oriented Programming concepts: Inheritance, Polymorphism, etc.
== Develop Functional Coverage Models and closing Code Coverage

No interview, relocation or living expenses provided

Please send resume as a Microsoft Word attachment to

Amarx Search, Inc.    

Dice Id : amarx
Position Id : 2288
Originally Posted : 3 months ago
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