Software Defined RF FPGA Developer

FPGA, JESD, SERDES, VERILOG, Embedded Systems, and Ethernet MAC Implementations
Full Time
Depends On Experience
Telecommuting not available Travel not required

Job Description

About ASI:

Applied Signals Intelligence, Inc., (ASI), is a fast growing, entrepreneurial, employee owned Cyber-EM and ISR systems provider. ASI’s team of engineers and scientists have developed new, patented, ultrawideband vector-sensor and signal processing technologies for signal intercept and Radio Frequency Direction Finding (DF) of communication and radar waveforms.

ASI delivers software defined radios, antennas and processors to its customers, and supports platform integrations, system integrations, and, Concept of Operations development. ASI is continually performing research and developments to enhance the capability and extend the reach or its technologies.

Job Summary:

Our team activities include software development, custom hardware design, digital signal processing, FPGA design and implementation, and python/java/C++ programming/simulation. As a member of our team, you will work with others to design, code, implement, and test custom SDR functions such as DF engines, demodulators, detectors, advanced waveform analyzers, and classifiers for use in intercept and geo-location of signals of interest.

ASI is an early implementer of the Xilinx® Zynq® Ultrascale+™ RF system-on-chip technology (RFSoC) and has immediate openings for FPGA, software and algorithm developers to leverage this technology in our products. Specific FPGA related projects include the implementation of high speed interfaces, digital up and down converters, filtering function, data capture, and FFT engines.


  • Develop functional blocks in Verilog and other programming techniques
  • Implement high bandwidth signal flow and timing precise command and control
  • Implement FPGA based accelerators for signal processing algorithms
  • Implement time stamping and data wrapping functions for high precision coordination of resources
  • Design JESD, Giga-Bit Ethernet, 10+ Giga-Bit Optical, and other SERDES for high speed interface protocols


  • BS/MS/PhD in Electrical Engineering, Computer Engineering, or other relevant technical discipline, or a demonstrable portfolio of functional SDR accomplishments
  • Minimum 5 years high-speed FPGA design experience with VERILOG and/or VHDL
  • Minimum 2 years embedded systems experience
  • Knowledge of ethernet MAC implementations
  • Experience working with DSP engineers to implement signal processing algorithms
  • Personal communication skills

Relevant Extras:

  • Vita-49 and Vita-49.2 protocol knowledge
  • Working knowledge of JESD
  • TS/SCI clearance desired. U.S. Citizenship required


  • All employees participate in company stock option plan
  • Entrepreneurial team environment that you can influence
  • Product and technology development path that you can influence
  • ASI offers a comprehensive benefits package including a liberal vacation plan, a matching retirement program, strong health care, and competitive salaries commensurate with skills and experience.


Dice Id : 9107883sc
Position Id : 506685
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