ASIC/ SOC/ RTL Verification Engineer

SystemVerilog, UVM
Full Time
$80,000 - $180,000

Job Description

  • Experience in pre-silicon RTL Verification /IP Verification / SOC verification 
  • Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM) 
  • Domain expertise in one or more of the following areas 
  • System-on-a-chip verification with multiple CPUs and fixed function units with AXI or NOC interconnects 
  • Verification of embedded CPUs such as ARM, Ten silica, MIPS CPUs and interconnect subsystem through C/Assembly language tests 
  • Verification of industry standard serial interfaces such as MIPI, USB, PCIe using industry standard VIP components. 
  • Ethernet Packet Processors, buffer managers, DMA engines etc.... 
  • PHY layer verification of serial interfaces such as Ethernet, PCIe, USB etc. 
  • Solid Linux environment skills including the use of Perl, Python or TCL to write/debug CAD tool scripts. 
Dice Id : 10110759
Position Id : 7300889
Originally Posted : 5 months ago
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