ASIC/FPGA Design Verification Engineer

Wireless, ASIC, FPGA, Engineer, Security, Engineering, Computer, VHDL, System, Verilog, C, Python, Test
Contract W2

Job Description

Solidus is searching for a Wireless ASIC/FPGA Verification Engineer with a strong digital signal processing understanding. The Engineer will be joining a group that specializes in advanced network and communications systems development, with a focus on rapid prototyping of radical next generation tactical mobile, military airborne communications systems.

The Engineer will participate in the verification efforts of wireless communications systems. The group is developing novel new architectures and waveforms and is looking to add to the team that will prototype and field test the technologies. This individual will be a key member of the hardware team, working closely with the designers to develop the verification environment, test plans and functionality of the ASIC and FPGA designs.

Required skills:
- ==== and Able to Obtain a DoD Security Clearance. Active Secret Clearance preferred
- PhD plus 5 years minimum relevant experience, or MS plus 8 years' minimum relevant experience or, BS and 10+ years' experience. Degree in Electrical Engineering, Computer Engineering, Computer Science or related preferred.
- Several successful completions of ASIC/FPGA design/verification cycles from architecting and creation of FPGA/ASIC test environment to demonstration on hardware
- In-depth understanding of digital signal processing algorithms relevant to communications
- Solid verification skills, which includes planning, debugging, random testing, black box testing and adversarial testing for ASIC and Xilinx FPGAs and Vivado
- Solid verification experience working with VHDL Designs using VHDL or System Verilog
- Strong C/C++ and scripting (TCL and Python preferred)
- Test Plan definition, design and development, coverage specification and analysis and automation of the regression test suite

Preferred skills:
- Proficient in OS-VVM, UVM, or other functional verification methodologies
- ASIC verification experience
- Strong understanding of fundamentals of wireless digital communications systems and all PHY processes from "data in" to "baseband I/Q out"
- Able to clearly articulate the function of all digital blocks in a typical communications chain (encoders, modulators, correlators, matrix arithmetic, etc.).
- Experience with MATLAB is a plus

Job ID 3697

Applicants selected must meet eligibility requirements for access to classified information. U.S. Citizenship may be required. Solidus is an Equal Opportunity Employer and participates in E-Verify. NOTICE OF AFFIRMATIVE ACTION PLAN FOR INDIVIDUALS WITH DISABILITIES, DISABLED VETERANS AND OTHER PROTECTED VETERANS. It is the policy of this Company to seek and employ qualified individuals at all locations and facilities, and to provide equal employment opportunities for all applicants and employees in recruiting, hiring, placement, training, compensation, insurance, benefits, promotion, transfer, and termination. To achieve this, we are dedicated to taking affirmative action to employ and advance in employment qualified individuals with disabilities, disabled veterans, and other protected veterans. The objective in adopting the Affirmative Action Programs is to place qualified individuals with disabilities, disabled veterans and other protected veterans in all job classifications. These Affirmative Action Programs are available for inspection by any applicant or employee by contacting the Company's EEO Coordinator, in the Human Resources office, Monday through Friday, 8am to 5pm
Dice Id : 10121974
Position Id : 3697
Originally Posted : 3 months ago
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