ASIC Designer

asic design, cpu, soc, rtl, verilog, timing closure, dft
Contract W2, Contract Independent, 12 Months
Depends on Experience
Work from home not available Travel not required

Job Description

Senior IC Designer:

  • Design and verify key processing blocks of camera video/vision processors
  • Design elements of the SOC processing fabric including CPU, high speed interfaces, memory interconnect, top level clock and reset structures
  • An emphasis on design for debug from the block level and chip level
  • Design of power management structures to achieve the lowest power consumption in multiple operational modes
  • Develop block/system level RTL to meet synthesis/physical, DFT and power goals
  • Develop block architecture & RTL that will meet the functional safety requirements
  • Collaborate with the physical design team to meet overall physical design targets
  • Work with verification team to develop and review test plans


  • BSEE
  • 8 years of industry experience in digital design
  • Experience in RTL design with Verilog/System Verilog
  • Understanding of standard IC design methodology including simulation, synthesis, timing closure and DFT
  • Strong programming skills in C and scripting languages such as Python
  • 5 years of design experience with FPGA or ASIC.

Posted By

Branden Roddamer

2756 N Green Valley Parkway, Suite 209 Henderson, NV, 89014

Dice Id : 10308440
Position Id : 6309499
Originally Posted : 2 months ago
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