DFT Verification Engineer - 001178

Understanding of Design For Test methodologies and DFT verification experience with scan, memory BIST
Contract W2, 6 Months
Market
Telecommuting not available Travel not required

Job Description

DFT engineer job description:


•       Implementation and verification of DFT architecture and features
•       Scan/Jtag/boundary scan insertion and ATPG pattern generation
•       ATPG patterns verification with gate level simulation
•       Test coverage and test cost reduction analysis
•       Post silicon support to ensure successful bringup and enhance yield learning
•       Ability to debug large complex scan drc and gate level simulation issues at SoC level
•       Understanding of Design For Test methodologies and DFT verification experience (eg.
       IEEE1500, JTAG 1149.x, scan, memory BIST, ? etc)
•       Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
•       Experience with VCS simulation tool, Perl/Shell scripting and Verilog RTL design
•       Excellent oral, written and interpersonal communication skills

Posted By

Woody Arnold

4518 Seaboard Lane Fort Collins, CO, 80525

Dice Id : 10110992
Position Id : 709869
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