DRAM Memory Validation Engineer

DDR SDRAM, DRAM, DDR, LPDDR, SOC
Full Time
Depends on Experience

Job Description

Job Title: DRAM Memory Validation Engineer

Duration: Full Time

Location:  Mountain View, CA

Job description :

  • Ensure robust operation and successful integration of DRAM memories and SOC devices for products developed by Google
  • Ensure Memory Controller, DRAM silicon, and board level testing meets JEDEC electrical and functional specifications
  • Execute validation test plans for functional, characterization and qualification
  • Experience with High Bandwidth Scope, Logic/Protocol Analyzer and Temperature Chambers
  • Experience in LPDDR/DDR IO characterization, qualification and reviewing, tuning memory calibration code/algorithms
  • Expertise in bootloader/firmware development in C/C++ and assembly
  • Previous experience in Failure Analysis of DRAM devices
  • Skills with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity
  • 5+ years in Memory Controller validation and DRAM validation
Dice Id : 10110759
Position Id : 7409460
Originally Posted : 4 months ago
Have a Job? Post it