Position Title: PCB Layout Engineer
Location: Sunnyvale, CA (100% onsite, no remote)
Duration: 3-6 months, possible extensions
Ideal Start Date: 09/23/2019
Process: Two rounds first will be a 30-45 minute phone interview with hiring manager. Second round onsite with hiring manager and 2-3 team members for 2 hours total.
Background Check Required
Scope: The candidate will be working for a large industry leader on one of their next generation networking products. The candidate for the position of PCB Layout Engineer will contribute in all phases of the products design,
including design feasibility, placement, routing, constraint table management, through tapeout. Must bring a combination of PCB design and signal integrity knowledge, fabrication knowledge, cross-team functional
interdependence, and design process experience. The candidate will have a background in high-speed design layout, DFX, and DFM.
Duties: Layout and plan routing for backplanes and dense high-speed boards, using Cadence Allegro tools. Capabilities including ability to efficiently understand and use Cadence Constraint Manager Minimum 2 years
of college or equivalent Minimum 3-6 years experience PCB Layout
-PCB Design, Constraint manager, high-speed rule processing, crosstalk control,
-Knowledge and hands-on experience in high density, high-speed PCB for high layer count on large form factor products.
-Experience with Cadence CAD tools for layout, DRC and Post process.
-Good communications in oral and written English language.
Education: AS engineering or technical discipline or equivalent experience
Optional: BA, BS or equivalent degree in a relevant field
2105 S Bascom Ave., Suite 255 Campbell, CA, 95008Contact