Design Verification Engineer Jobs in 95134

1 - 20 of 4,629 Jobs

Design Verification Engineer III (eInfochips Inc)Job Title - Design Verification Engineer III (eInfochips Inc)

Arrow Electronics, Inc.Company Name - Arrow Electronics, Inc.

•

On-site in San Jose, California, USA

Full-time

Position: Design Verification Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: At-least 8+ years of experience in System Verilog HVL.At-least 8+ year of experience in UVM.Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.Proficient in SVTB/UVMProficient in debug

Design Verification EngineerJob Title - Design Verification Engineer

Della InfotechCompany Name - Della Infotech

•

On-site in Mountain View, California, USA

Contract, Third Party

Name: Hardware Engineer Mid. Duration: 11 Months Location: Mountain View, CA (Preferred) The client is open to considering remote if a candidate is strong. Duties: Note: This requisition is a reference to a Design Verification Engineer who comes with strong experience in SOC Verification, System Verilog, UVM, BFM/Driver/Monitor/Scoreboard component development, and AXI protocol. What candidate will Be Doing: At-least 8+ years of experience in System Verilog At-least 8+ year of experience in UV

Design Verification EngineerJob Title - Design Verification Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

•

Hybrid in San Jose, California, USA

Contract

Job Title: Design Verification Engineer Duration: 12+ months (Possible Extension-Long Term Project) Location: San Jose, CA (Hybrid-3 Days onsite Description As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems.Responsibilities Triage regression failures and make testbench updatesDebug functional errors in RTL model using simulation and debug tools.Maintain efficient and clean regression statusDevelop

GPU Design Verification Engineer, StaffJob Title - GPU Design Verification Engineer, Staff

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

•

On-site in Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: Owning and executing on key independent tasks towards program requireme

Design Verification Engineer (GPU)Job Title - Design Verification Engineer (GPU)

Xoriant CorporationCompany Name - Xoriant Corporation

•

On-site in San Jose, California, USA

Contract

Design Verification Engineer (GPU) - Local to market in San Jose - Hybrid onsite 3 days per week Role and Responsibilities: Work with architects and designers to build verification environments and test plansAnalyze failing tests to root cause along, working with RTL and reference modeling teamsProvide input on Architectural and Micro-Architectural specifications for testability and accuracyExamine code coverage results, identifying exclusions and improving stimulusMinimum requirements: - Know

ASIC Design Verification Engineer (Santa Clara, CA)Job Title - ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

•

On-site in Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

Senior ASIC / FPGA Design Verification EngineerJob Title - Senior ASIC / FPGA Design Verification Engineer

Technical LinkCompany Name - Technical Link

•

Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing

Software Verification Engineer (Healthcare Industry)Job Title - Software Verification Engineer (Healthcare Industry)

VeridianTechCompany Name - VeridianTech

•

On-site in Palo Alto, California, USA

Third Party, Contract

Job Title: Software Verification Engineer Location: Palo Alto, CA Duration: 12+ months Job Description: We are seeking an exceptionally skilled software testing lead with solid experience leading verification testing in a regulated environment preferably for IVD-grade software. The software is a mix of microservices that control and communicate with a laboratory automation system. The software stack that will be verified spans microservices that are hosted on-prem (or in AWS) as well as labor

Silicon Verification Engineer 5Job Title - Silicon Verification Engineer 5

WinMax Systems CorporationCompany Name - WinMax Systems Corporation

•

Hybrid in Mountain View, California, USA

Contract

Title:Silicon Verification Engineer 5Location: Mountain View,CA(Hybrid)Contract:4+ Month Job Description: Skill set: SystemVerilog and C/C++ coding a must Chip/full system level ASIC Verification skills, and debug skills a must o Debug using waveforms a must, Verdi source level debug a plus System level knowledge a must o System is defined as a test bench containing {CPU + multi-media engines } with hardware based coherency, o System could be a simulation test bench, emulation test bench or a bo

Verification engineer || Palo Alto CA (Hybrid)Job Title - Verification engineer || Palo Alto CA (Hybrid)

VeridianTechCompany Name - VeridianTech

•

On-site in Palo Alto, California, USA

Third Party, Contract

Hi , Hope you are doing well. I have an urgent opening of Verification engineer at Palo Alto CA (Hybrid) with one of our direct client. Please let me know if you are interested in below role. **Kindly share your updated resume** Job Title: Verification engineer Location Palo Alto CA (Hybrid) Duration : 6+ Contract We are seeking an exceptionally skilled software testing lead with solid experience leading verification testing in a regulated environment preferably for IVD-grade software. The s

Software Verification EngineerJob Title - Software Verification Engineer

Nityo Infotech CorporationCompany Name - Nityo Infotech Corporation

•

Hybrid in Palo Alto, California, USA

Third Party, Contract

Responsibilities Automation Software Test Engineer, Experience writing Verification Test Plans Job Description: We are seeking an exceptionally skilled software testing lead with solid experience leading verification testing in a regulated environment preferably for IVD-grade software. The software is a mix of microservices that control and communicate with a laboratory automation system. The software stack that will be verified spans microservices that are hosted on-prem (or in AWS) as well as

Hardware Design Engineer 5Job Title - Hardware Design Engineer 5

WinMax Systems CorporationCompany Name - WinMax Systems Corporation

•

On-site in Mountain View, California, USA

Contract

Title: Hardware Design Engineer 5Location: Mountain View, CA (onsite)Contract: 6+ Month Job Description: Candidate Requirements - 10+ overall years of experience in the design verification - Hands-on experience with UVM, Testbench Test case coding - Working experience with System Verilog and C languages - AXI and PCIE protocol experience is plus - Good Communication skills and team player Degrees or certifications required: Bachelors degree in computer science or electrical engineering or relat

Controls Design EngineerJob Title - Controls Design Engineer

Ledgent TechnologyCompany Name - Ledgent Technology

•

On-site in Pleasanton, California, USA

Full-time

Job Title: Controls Design Engineer ll Location: Pleasanton, CA Direct Hire JOB SUMMARY The position requires the individual to apply their technical knowledge and any prior experience to produce controls project design, material selection, and development of sequence of operation for lower to mid-level projects. Responsible for producing closeout documents at the completion of each project. Proficient level of computer skills and understanding of computer-operated systems and engineering des

ASIC Verification EngineerJob Title - ASIC Verification Engineer

Technical LinkCompany Name - Technical Link

•

On-site in Santa Clara, California, USA

Full-time

Job Description Work with a dedicated team of engineers, using the latest verification practices, to verify the digital design intent of our SOC's at the block and system level. Engage early in the verification process to understand the verification requirements and participate in UVM or SystemVerilog testbench development. Responsible for creating tests to verify the SOC design at the system or block level and to implement checking mechanisms to ensure coverage closure.Job Requirements 15+ year

Sr RF Design EngineerJob Title - Sr RF Design Engineer

CompNovaCompany Name - CompNova

•

On-site in San Ramon, California, USA

Contract, Third Party

Hi, I have urgent reqt with one of our client. Pl see the job description below, if interested, pl send me the resume in MS word format along with your expected hourly rate? Position Name : Sr RF Design Engineer Location : San Ramon, CA Duration : 6 to 12 months with high possibility of extension ONSITE from the day one / 2 to 3 days in office is needed Expert in 4G/5G especially in RAN DesignRAN engineer that s familiar with client's processes.Knowledgeable in RAN tools like MapInfo, AtollKnowl

Senior Physical Design EngineerJob Title - Senior Physical Design Engineer

SambaNova SystemsCompany Name - SambaNova Systems

•

On-site in Palo Alto, California, USA

Full-time

Working at SambaNova This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization's business and operations. SambaNova is hiring a Senior Physical Design Engineer who will be responsible for developing and maintaining synthesis and physical composition flow utilizing leading industry tools. In this role, you will play a unique and critical role in the development of the SambaNova DataScale system and you will be provided wit

Senior Hardware Design Validation Test (DVT) Engineer (Contractor)Job Title - Senior Hardware Design Validation Test (DVT) Engineer (Contractor)

SambaNova SystemsCompany Name - SambaNova Systems

•

On-site in Palo Alto, California, USA

Contract

Working at SambaNova This is a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organizations business and operations. This job opens pathways for high growth, but requires a learning mindset. Job Type: Contract Duration: 3-6 months with the possibility of conversion to full-time employment. Schedule: Flexible 8-hour shifts Monday through Friday between the hours of 8:00am to 8:00pm Pacific Time, with occasional nights and/or weekends as needed f

Physical Design EngineerJob Title - Physical Design Engineer

Viva Tech SolutionsCompany Name - Viva Tech Solutions

•

On-site in Santa Clara, California, USA

Full-time

Title: Physical Design Engineer (8-15 Years Experience) Location Santa Clara CA USA Fulltime Job Description: As a Physical Design Engineer, you will play a crucial role in the RTL to GDS flow, including Synthesis and Place & Route (PNR). You will utilize tools such as Fusion Compiler and Cadence Innovus to optimize designs for performance, power, and area. Your responsibilities will encompass macro placement, floorplanning, clock tree synthesis (CTS), and routing. Key Responsibilities: Execute

Senior Electrical Design EngineerJob Title - Senior Electrical Design Engineer

JobotCompany Name - Jobot

•

On-site in San Jose, California, USA

Full-time

Onsite in Maryland - RELOCATION OFFERED! This Jobot Job is hosted by: David DeCristofaro Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $120,000 - $165,000 per year A bit about us: We are a leading global manufacturer of tens of thousands of parts and equipment. Our equipment is used in a multitude of sectors including biomedical, manufacturing, space, and others. As an industry leader, we pride ourselves on staying ahead of the curve, and

ASIC Design EngineerJob Title - ASIC Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

•

On-site in Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o