Senior Lead Design Verification Engineer

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The Judge Group, Inc.
Engineer, ASIC, FPGA, Verilog, System, Python, Engineering, Computer
Full Time
Work from home not available Travel not required

Job Description

Location: Pleasanton, CA
Description: Our client is currently seeking a Senior Lead Design Verification Engineer

Kindly respond with updated resume if available and interested at


Experience in system and hardware modeling and verification ASIC or FPGA verification at chip and system level Reviewing architecture specifications Experience in specifying and developing verification infrastructure, test bench design and verifying complex hardware, software and performance modeling Experience with modern simulators and debuggers, e.g. Questa, Vivado, Quartus etc. Expertise in C/C++, Verilog, System Verilog, System C, Python, UVM etc. Develop test cases, coverage reports and regressions Strong analytical problem solving and attention to detail Excellent written and verbal communication skills DESIRABLE SKILLS AND EXPERIENCE: Knowledge of image sensor data processing a plus Experience with image processing or GPUs validation a plus EDUCATION & EXPERIENCE: BS in Electrical Engineering or Computer Engineering from a four-year college or university, MS degree is a plus 10+ years of hardware development and verification experience Equal Opportunity Employer/Protected Veterans/Individuals with Disabilities


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Company Information

The Judge Group is a privately-owned, leading professional services firm. What does that mean? It means we provide technology, talent and learning solutions to businesses around the globe, and we're great at it. Our expertise is positioned at the crossroads of people and technology—two of the most important aspects of successful business today.
Dice Id : cxjudgpa
Position Id : 618249
Originally Posted : 3 months ago

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