SoC Network Architect

  • Veear,
  • Santa Clara, CA
  • 12 minutes ago
Teradata, area, SOC Network Architect. We are specifically looking for someone who understands and has implemented ROCE., Responsible for architecture of very high performance data processing chip Drive Architecture/Software/Hardware co-design and collaboration on the networking feature set. Collaborate with our verification team to verify the correctn, performance and power goals Identify performance bottlenecks and optimize system performanceWhat we are looking for: Member of our core team, responsible for crafting and timely delivery of the networking feature set Good working knowledge of networking technologies including Ethenet, IP, Infiniband, RoCE etc. Good understanding of NIC architecture and data transfer protocols like TCP/IP, IB verbs, RDMA Good working knowledge of PCI Express
Full Time, fulltime
Work from home not available Travel not required

Job Description

SOC Network Architect.

We are specifically looking for someone who understands and has implemented ROCE.

Senior System on Chip Network Architect

Level: Experienced, Full Time Employee

What you'll be doing:

Responsible for architecture of very high performance data processing chip

Drive Architecture/Software/Hardware co-design and collaboration on the networking feature set.

Collaborate with our verification team to verify the correctness of chip top level

Work with RTL engineers to achieve timing, area, performance and power goals

Identify performance bottlenecks and optimize system performance

What we are looking for:

Member of our core team, responsible for crafting and timely delivery of the networking feature set

Good working knowledge of networking technologies including Ethenet, IP, Infiniband, RoCE etc.

Good understanding of NIC architecture and data transfer protocols like TCP/IP, IB verbs, RDMA

Good working knowledge of PCI Express, DDR5/4 and HBM2, I/O and MSI-X

A strong background in computer architecture is highly desirable

Strong communication and interpersonal skills are required working with our global team

Verilog expertise and deep understanding of ASIC design flow

Expertise in Verilog RTL design, logic synthesis, prototyping, and timing closure

More than 5 years of experience architecting high performance chips

BS or MS in Electrical Engineering or Computer Science

Ability to learn new technologies and apply the knowledge quickly

Ability to meet project milestones and deadlines

Posted By

Tanveer Ajmal

Dice Id : 10110940
Position Id : 2019-250
Originally Posted : 1 month ago
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