Verification Engineer - Intermediate -001138

Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
Contract W2, 12 Months
Telecommuting not available Travel not required

Job Description


Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
Be familiar with hardware modeling and/or assertion-based verification methods.


3 or more years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting
Strong background in C/C++ development in a Linux Environment
Strong debug skills and experience with debug tools such as Gdb, Valgrind
Proficient in Object Oriented programming, STL, computer architecture and data structures Knowledge of Perl and Makefiles; Experience in Verilog/SystemVerilog/SystemC, preferred; Experience in C/Verilog environment using DPI/PLI, preferred; Strong analytical skills and attention to detail
Excellent written and communication skills.

Code coverage:

1. Understanding why code coverage is important.
2. Experience in understanding of different types of code coverage.
3. Experience in analyzing code coverage.
4. Experience in finding coverage holes and reporting to the designers
5. Experience in identifying the test scenarios to cover the holes.
6. Experience in creating and reviewing exclusions.
7. Experience in providing suitable coverage pragmas to the designers.

Functional Coverage using system Verilog:

1. Understanding why functional coverage is important.
2. Experience in writing functional cover points.
3. Experience in cross coverage.
4. Experience in reviewing functional coverage, functional cover points.
5. Knowledge of various functional cover points terms and experience in using the same.
6. Experience in writing re-usable cover points
7. Experience in analyzing functional coverage
8. Experience in identifying exclusions and creating exclusions.

Posted By

Woody Arnold

4518 Seaboard Lane Fort Collins, CO, 80525

Dice Id : 10110992
Position Id : 697267
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