Entry Level Physical Design Engineer Jobs in San Jose, CA

1 - 20 of 2,451 Jobs

Physical Design EngineerJob Title - Physical Design Engineer

Viva Tech SolutionsCompany Name - Viva Tech Solutions

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On-site in Santa Clara, California, USA

Full-time

Title: Physical Design Engineer (8-15 Years Experience) Location Santa Clara CA USA Fulltime Job Description: As a Physical Design Engineer, you will play a crucial role in the RTL to GDS flow, including Synthesis and Place & Route (PNR). You will utilize tools such as Fusion Compiler and Cadence Innovus to optimize designs for performance, power, and area. Your responsibilities will encompass macro placement, floorplanning, clock tree synthesis (CTS), and routing. Key Responsibilities: Execute

SoC Physical Design Engineer, Electrical AnalysisJob Title - SoC Physical Design Engineer, Electrical Analysis

Apple, Inc.Company Name - Apple, Inc.

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On-site in Sunnyvale, California, USA

Full-time

Summary Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies

Staff SOC Physical Design EngineerJob Title - Staff SOC Physical Design Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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On-site in Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: A SOC Physical Design Engineer plays a crucial role in the development and implementation of products at Qualcomm. This role requires strong knowledge of physical design tools (like Cadence or Synopsys), semiconductor processes, and an understanding of timing closure, clock tree synthesis, power optimization, and physical verification methodologies. Additionally, communication ski

Senior Product Engineer- Physical Design and VerificationJob Title - Senior Product Engineer- Physical Design and Verification

SIEMENS PLM SOFTWARE, INC.Company Name - SIEMENS PLM SOFTWARE, INC.

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On-site in Fremont, California, USA

Full-time

Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around the world to develop new and highly innovative electronic IC products faster and more cost-effectively. Our customers are engineers who use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Position Overview Fast. Reliable. Innovative. Ahead. These are words people us

Project Design Engineer - Physical Security SystemsJob Title - Project Design Engineer - Physical Security Systems

Brookfield GlobalCompany Name - Brookfield Global

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Remote

Full-time

As a Project Design Engineer, you will be a key member in designing, documenting, testing, commissioning, and/or bidding on electronic security installation projects. Key responsibilities and experience should include: Manage respective projects, keeping consistent communication and track of deadlines. Engage with the different stakeholders and vendors. Ability to interpret physical security standards, drawings, bill of materials, request for proposals, and submittal requirements provided by the

Senior Physical Design EngineerJob Title - Senior Physical Design Engineer

Technical LinkCompany Name - Technical Link

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Remote

Contract

6 month contract 100% Remote Experience with Synopsys Fusion Compiler and flows.Experience with GF22FDX technology.Years of experience: 10+Initial feedback from manager: I ve had a chance to review the ones forwarded with a few as potentials to consider. For one the programs that I will be involved with, I still need to work with our business development and the customer to ensure we understand the full context of their requirements taking the next step to interview the candidates. The key is h

Hardware Design Engineer 5Job Title - Hardware Design Engineer 5

WinMax Systems CorporationCompany Name - WinMax Systems Corporation

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On-site in Mountain View, California, USA

Contract

Title: Hardware Design Engineer 5Location: Mountain View, CA (onsite)Contract: 6+ Month Job Description: Candidate Requirements - 10+ overall years of experience in the design verification - Hands-on experience with UVM, Testbench Test case coding - Working experience with System Verilog and C languages - AXI and PCIE protocol experience is plus - Good Communication skills and team player Degrees or certifications required: Bachelors degree in computer science or electrical engineering or relat

Physical Design EngineerJob Title - Physical Design Engineer

Xoriant CorporationCompany Name - Xoriant Corporation

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Hybrid in San Jose, California, USA

Contract

Job Title: Physical Design Engineer Location: San Jose, CA (hybrid) Duration: 6+ months (Possible Extension-Long Term Project) Rate: $100/hr on w2 Description Perform physical implementation in Synopsys tools (ICC2)Develop and maintain the tool flow to support the project.Work with Team to enhance PD methodology.Fixing DRC/LVS issuesFixing voltage drop violationsTiming ECOsRequirements Experience in advanced node processes 16nm and below.Experience with industry-standard tools, preference for Sy

Design Verification EngineerJob Title - Design Verification Engineer

Della InfotechCompany Name - Della Infotech

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On-site in Mountain View, California, USA

Contract, Third Party

Name: Hardware Engineer Mid. Duration: 11 Months Location: Mountain View, CA (Preferred) The client is open to considering remote if a candidate is strong. Duties: Note: This requisition is a reference to a Design Verification Engineer who comes with strong experience in SOC Verification, System Verilog, UVM, BFM/Driver/Monitor/Scoreboard component development, and AXI protocol. What candidate will Be Doing: At-least 8+ years of experience in System Verilog At-least 8+ year of experience in UV

Controls Design EngineerJob Title - Controls Design Engineer

Ledgent TechnologyCompany Name - Ledgent Technology

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On-site in Pleasanton, California, USA

Full-time

Job Title: Controls Design Engineer ll Location: Pleasanton, CA Direct Hire JOB SUMMARY The position requires the individual to apply their technical knowledge and any prior experience to produce controls project design, material selection, and development of sequence of operation for lower to mid-level projects. Responsible for producing closeout documents at the completion of each project. Proficient level of computer skills and understanding of computer-operated systems and engineering des

Junior Hardware Lab Engineer - Data CenterJob Title - Junior Hardware Lab Engineer - Data Center

Advantis Global, LLCCompany Name - Advantis Global, LLC

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On-site in Cupertino, California, USA

Contract

ABOUT THIS FEATURED OPPORTUNITY Join an exciting team as a Junior Hardware Lab Engineer with Advantis Global, dedicated to connecting YOU to highly sought-after opportunities. Our client, a prominent player in multinational technology, is actively seeking a skilled individual to take on the role of a Junior Hardware Engineering Lab Engineer. Day shift - 9-5 (flexible) THE OPPORTUNITY FOR YOU As a Hardware Engineering Lab Engineer, you will: - Sustain and enhance a Lab environment supporting our

Senior System Engineer - Physical Security SystemsJob Title - Senior System Engineer - Physical Security Systems

Brookfield GlobalCompany Name - Brookfield Global

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Hybrid in Sunnyvale, California, USA

Full-time

Industry leader are looking to hire a Senior Security System Engineer due to growth. Key responsibilities will include: Design of security system architecture for ACS, IDS, CCTV, etc. Design of LAN and WAN topologies for security systems including switches, routers, and firewalls Integration of security systems with VMWare, Windows, and Unix operating systems. Support and mentor Engineers. Research and Development, technology Roadmaps. Experience & Qualifications should include: Bachelor's degre

Embedded Software Engineer Jr-MidJob Title - Embedded Software Engineer Jr-Mid

Motion Recruitment Partners, LLCCompany Name - Motion Recruitment Partners, LLC

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On-site in Belmont, California, USA

Full-time

This Series A tech startup does real time 3D location tracking for IOT, industrial, drones, phones, vehicles, and more! They're looking to hire a Jr-Mid Embedded Software Engineer to join the team for a variety of exciting projects. This is a full time, onsite role in Belmont, CA. You must be local to the Bay Area, CA to be considered for this role. Apply today! Required Skills & Experience: 1-4 years of professional experience Python/C++ (rust is a plus) Embedded RTOS/Linux Startup experience i

Sr RF Design EngineerJob Title - Sr RF Design Engineer

CompNovaCompany Name - CompNova

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On-site in San Ramon, California, USA

Contract, Third Party

Hi, I have urgent reqt with one of our client. Pl see the job description below, if interested, pl send me the resume in MS word format along with your expected hourly rate? Position Name : Sr RF Design Engineer Location : San Ramon, CA Duration : 6 to 12 months with high possibility of extension ONSITE from the day one / 2 to 3 days in office is needed Expert in 4G/5G especially in RAN DesignRAN engineer that s familiar with client's processes.Knowledgeable in RAN tools like MapInfo, AtollKnowl

Junior AI/ML Engineer ( Max rate 42/H on C2C or 37/H on w2)Job Title - Junior AI/ML Engineer ( Max rate 42/H on C2C or 37/H on w2)

Valiantica, IncCompany Name - Valiantica, Inc

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Hybrid in Sunnyvale, California, USA

Third Party, Contract

AI/ML - Creating a model from scratch. Experience with Python. Only 2 Year exp persons.

Junior AI/ML Engineer ( Max rate 42/H on C2C or 37/H on w2)Job Title - Junior AI/ML Engineer ( Max rate 42/H on C2C or 37/H on w2)

Valiantica, IncCompany Name - Valiantica, Inc

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Hybrid in Sunnyvale, California, USA

Contract, Third Party

AI/ML - Creating a model from scratch. Experience with Python. Only 1-2 Year exp persons.

Senior Hardware Design Validation Test (DVT) Engineer (Contractor)Job Title - Senior Hardware Design Validation Test (DVT) Engineer (Contractor)

SambaNova SystemsCompany Name - SambaNova Systems

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On-site in Palo Alto, California, USA

Contract

Working at SambaNova This is a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organizations business and operations. This job opens pathways for high growth, but requires a learning mindset. Job Type: Contract Duration: 3-6 months with the possibility of conversion to full-time employment. Schedule: Flexible 8-hour shifts Monday through Friday between the hours of 8:00am to 8:00pm Pacific Time, with occasional nights and/or weekends as needed f

Pll Circuit Design Engineer - HybridJob Title - Pll Circuit Design Engineer - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Hybrid in Santa Clara, California, USA

Contract

Title: Pll Circuit Design Engineer - Hybrid Description: THE PERSON: Solid knowledge Analog Circuit Design in FinFET technology specifically in PLLs and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, feedback and compensation techniques, bandgap, TDC, interpolator circuits, high speed buffers etc. Solid knowledge of industry standard tools and practices for analog circuit design Good knowledge in Physical design, STA, methodology scripts (Tcl), knowledge on Perl,

ASIC Design EngineerJob Title - ASIC Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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On-site in Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

ASIC Design EngineerJob Title - ASIC Design Engineer

Apple, Inc.Company Name - Apple, Inc.

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On-site in Cupertino, California, USA

Full-time

Summary As an ASIC Design Engineer, the individual's primary responsibility will be RTL design. This will include chip architecture definition, block/function definition, specification, design, simulation and unit level verification of digital functions on Mixed Signal ASICs. Key Qualifications Proven track-record in digital design including RTL design experienceStrong understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back