•San Jose, California, USA
Interfaces: PCIE, Ethernet, MIPI, DDR, USB, Embedded C, Python Areas of Responsibility Lead the Silicon bringup process for new chip from initial poweron to Functional Validation and performance OptimizationDevelop Comprehensive validation plans and methodologies to ensure the functionality,performance and reliablity of Silicon.Oversee functional Validation activies for Silicon with focus on hardware debugging and Troubleshooting .Collaborate closely with the crossfunctional teams and IP Vendors