Principal ASIC Designer Jobs in 95051

1 - 20 of 55 Jobs

Senior Principal ASIC Design Engineer (Hybrid)Job Title - Senior Principal ASIC Design Engineer (Hybrid)

BAE SystemsCompany Name - BAE Systems

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On-site in San Jose, California, USA

Full-time

Job Description You don't see it, but it's there. Our employees work on the world's most advanced electronics - from saving emissions in the City of Lights to powering the Mars Rover to protecting the F-35 fighter jet. At Electronic Systems, you'll be among the brightest minds, working on the aerospace and defense industry's most difficult problems. Drawing strength from our differences, we're innovating for the future. And you can, too. Our flexible work environment provides you a chance to ch

Principal UX DesignerJob Title - Principal UX Designer

Gratiture SolutionsCompany Name - Gratiture Solutions

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On-site in Sunnyvale, California, USA

Full-time

Gratiture Solutions is one of the fastest growing staffing company serving clients in the US, Mexico, India, and Canada. We have an open position with the following details: Location: McLean, VA or Bay Area CA (Sunnyvale) Type : Contract Contract Duration:6-12 months Note: Candidates must submit their portfolios before interview Rate: upon candidate experience End client-Confidential Industry: Food and beverage sector Principal UX Designer will extend beyond conventional design responsibili

RTL/ASIC Design EngineerJob Title - RTL/ASIC Design Engineer

NetwovenCompany Name - Netwoven

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Hybrid in San Jose, California, USA

Contract

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project s schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL coding Knowledge of PCIe Gen5 and PIPE specification Kno

Technical Business Development Manager with ASIC, Foundry and designing knowledgeJob Title - Technical Business Development Manager with ASIC, Foundry and designing knowledge

EpiksoCompany Name - Epikso

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On-site in San Jose, California, USA

Full-time

Sr. BDM role San Jose CA. Hybrid role Direct Hire permanent opportunity Salary Range: $170K-$240K as base salary + bonus + benefits Developing company.link's business to provide access to advanced ASIC foundry technologies to Small and Medium Businesses (SMBs) and to larger companies in North America. What you will do The IC-link division of the company is responsible for providing access to advanced ASIC foundry technologies to Small and Medium Businesses (SMBs) and to larger companies for

Sr. Machine Learning EngineerJob Title - Sr. Machine Learning Engineer

Object Technology Solutions, Inc.Company Name - Object Technology Solutions, Inc.

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Remote

Contract

Must have a BS or Master s degree or PhD in Electrical and/or Computer Engineering or Computer ScienceAt least 5 years of relevant work experience.Strong understanding of dimensionality reduction techniques, clustering, and classification.Familiarity with supervised and unsupervised machine learning metrics and requirements.Excellent writing, documentation, and communication skills.Ability to learn new skills and take on new responsibilities.Experience working with AI Accelerators and Performanc

Machine Learning Engineer 3Job Title - Machine Learning Engineer 3

Object Technology Solutions, Inc.Company Name - Object Technology Solutions, Inc.

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Remote

Contract

I am Madhu from OTSI (Object Technology Solutions, Inc.), we have an immediate opening for a Job Title Machine Learning Engineer 3 with one of our direct clients. Job Title: Machine Learning Engineer 3 Work Location: San Jose, CA Duration: Long Term Contract Job Description: Responsibilities include, but not limited to: Develop and Analyze Machine Learning or AI Models for Edge AI applications. Analyze Open-Source Large Language, Vision and Multi-modal models and deploy them for mobile syste

RTL Design EngineerJob Title - RTL Design Engineer

SGS ConsultingCompany Name - SGS Consulting

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Hybrid in Santa Clara, California, USA

Contract

THE DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and client s internal IPs.Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micr

100% Remote- Memory Controller Systems Architect @ San Jose, CAJob Title - 100% Remote- Memory Controller Systems Architect @ San Jose, CA

Kutir IncCompany Name - Kutir Inc

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On-site in San Jose, California, USA

Contract, Third Party

Hi, Please check the job description as below and let me know you if you would be interested and available. Please let me know your available time for a quick call Memory Controller Systems Architect San Jose, CA 6+ Months Responsibilities include, but not limited to: Modeling and analysis of system cache, memory controller scheduling algorithms, and features Develop tests, testplans and testing infrastructure for new architecture/features Developing, evaluating and optimizing new memory/st

100% Remote- System Engineer - Mobile SoC @ San Jose, CAJob Title - 100% Remote- System Engineer - Mobile SoC @ San Jose, CA

Kutir IncCompany Name - Kutir Inc

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On-site in San Jose, California, USA

Contract, Third Party

Hi, Please check the job description as below and let me know you if you would be interested and available. Please let me know your available time for a quick call System Engineer - Mobile SoC San Jose, CA 6+ Months You will be part of a team working on next-gen Memory and storage solutions, establishing the competitive advantage of the Micron parts or identifying the areas of improvement to stay ahead of the competition, you will contribute to the development of new architectures and products

RTL ASIC Design EngineerJob Title - RTL ASIC Design Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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On-site in San Jose, California, USA

Full-time

Innova Solutions is immediately hiring for an RTL ASIC Design Engineer. Job Title: RTL ASIC Design Engineer Location: San Jose, CA, USA Contract Duration: Full Time As an RTL ASIC Design Engineer, you will: Generate and retarget IP level tests to full chip.You would have to simulate IP tests,Debugging simulation failures to root cause them,Fixing test issues.You would have to verify design fixes. Qualified candidates should APPLY NOW for immediate consideration! Please hit APPLY to provide the

RTL Design engineer with strong experince on PCIeJob Title - RTL Design engineer with strong experince on PCIe

Della InfotechCompany Name - Della Infotech

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On-site in San Jose, California, USA

Contract, Third Party

Position: RTL Design engineer with strong experince on PCIe Location: San Jose, CA / Irvine, CA / Austin, TX Onsite Duration: 06 Months Candidate Roles and Responsibilities PCIe System Expertise:Deep understanding and hands-on experience in PCIe system architecture, with an emphasis on physical layer design and specification.Ensure compliance with PCIe specifications, including but not limited to PIPE interface, LTSSM, 8b/10b and 128b/130b encoding, EIEOS intervals, equalization and electrical i

Senior Software Engineer (Embedded / C++)Job Title - Senior Software Engineer (Embedded / C++)

Mumba TechnologiesCompany Name - Mumba Technologies

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Hybrid in Santa Clara, California, USA

Full-time

JOB DESCRIPTION The Senior System Software Engineering is a very high-profile, challenging and exciting role within Analog Inference.We are looking for highly motivated individuals that participate in technical discussions within cross functional teams, architecting, designing, and implementing System Software components, such as embedded firmware, PCIe Driver, and low-level System programs, for a series of Inference Accelerator Engines implemented in Silicon.Candidates for this role need to be

ASIC Design EngineerJob Title - ASIC Design Engineer

BlackFern RecruitmentCompany Name - BlackFern Recruitment

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On-site in Milpitas, California, USA

Full-time

Job Description Front-End ASIC Design Engineer - Milpitas, CA Our client develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas. The Front-End ASIC Design Engineer will be a key person in this growing design department. Micro-architecture experience is required. Great opportunity to work on current, ongoing and upcoming new projects. Hybrid remote/onsite position. Primary responsibilities include: Support customer s design through all phases o

RTL Design Engineer - OnsiteJob Title - RTL Design Engineer - Onsite

VIVA USA INCCompany Name - VIVA USA INC

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On-site in Santa Clara, California, USA

Contract

Title: RTL Design Engineer - Onsite Description: JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering KEY RESPONSIBILITIES: Perform RTL design of di

ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)Job Title - ASIC/RTL Design Engineer job opportunity at Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid)

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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On-site in Santa Clara, California, USA

Contract

Role Title: ASIC/RTL Design Engineer - Senior Location: Santa Clara, CA / Longmont, Colorado (Onsite/Hybrid) Duration: 12+ months contract DESCRIPTION: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ens

Senior DFT EngineerJob Title - Senior DFT Engineer

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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On-site in Santa Clara, California, USA

Full-time

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT pattern generati

ASIC Design Verification Engineer (Santa Clara, CA)Job Title - ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm TechnologiesCompany Name - Qualcomm Technologies

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On-site in Santa Clara, California, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This i

ASIC/RTL Design Engineer - Senior - HybridJob Title - ASIC/RTL Design Engineer - Senior - Hybrid

VIVA USA INCCompany Name - VIVA USA INC

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Hybrid in San Jose, California, USA

Contract

Title: ASIC/RTL Design Engineer - Senior Description: JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and client internal IP's. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC's in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development o

Sr. RTL Design EngineerJob Title - Sr. RTL Design Engineer

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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On-site in Santa Clara, California, USA

Third Party, Contract

Location: San Jose, CA - Hybrid (at least 3 days a week) KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate design process. Support post-silicon product bring-up/debug. PREFERRED EXPERIENCE: 10 years' experience in RTL

Senior Engineer (Multiple Openings)Job Title - Senior Engineer (Multiple Openings)

Samsung Electronics AmericaCompany Name - Samsung Electronics America

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On-site in San Jose, California, USA

Full-time

Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the wo