Verification and validation Jobs in 78745

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Graphics Verification Workflow Engineer

Apple, Inc.

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On-site in Austin, Texas, USA

Full-time

Summary Do you love problem solving and creating elegant solutions to highly complex technical challenges? As part of our Silicon Engineering team, you'll help develop and manufacture our next-generation, high-performance, power-efficient graphics processors! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this team means you'll be responsible for crafting and building the technology that fuels Apple devices.
Posted 5 days ago | Updated 1 hour ago

Graphics Verification Workflow Engineer

Apple, Inc.

•

On-site in Austin, Texas, USA

Full-time

Summary Do you love problem solving and creating elegant solutions to highly complex technical challenges? As part of our Silicon Engineering team, you'll help develop and manufacture our next-generation, high-performance, power-efficient graphics processors! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this team means you'll be responsible for crafting and building the technology that fuels Apple devices.
Posted 5 days ago | Updated 1 hour ago

GPU Design Verification Lead

Qualcomm Technologies

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On-site in Austin, Texas, USA

Full-time

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: GENERAL SUMMARY: Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: Owning and executing on key independent tasks towards
Posted 7 days ago | Updated 2 hours ago

Senior ASIC / FPGA Design Verification Engineer

Technical Link

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Remote

Contract

6 Months Fully remote Verification RESPONSIBILITIES The senior verifier will be called upon to: develop SystemVerilog (or VHDL) test benches for the verification of ASICs or FPGAs;apply the various techniques and approaches of the Universal Verification Methodology (UVM);contribute to the development of the test infrastructure;document and report problems found to designers and assist them in identifying the source of the problems;support laboratory testing.QUALIFICATIONS Experience in writing