asic verification engineer Jobs in san jose, ca

21 - 40 of 53 Jobs

ASIC Design Engineer STA & SDC SpecialistJob Title - ASIC Design Engineer STA & SDC Specialist

Della InfotechCompany Name - Della Infotech

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San Jose, California, USA

Third Party, Contract

Minimum Qualifications Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical or Computer Engineering with 5+ years of ASIC or related experience Experience with block/full chip SDC development in functional and test modes. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus Understanding of related digital design concepts (eg. clocking and async boundaries) Experience

Custom SOC IP Verification EngineerJob Title - Custom SOC IP Verification Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire to deliver innovative products. Together, we will build the next generation of life changing custom SOCs! If you are a motivated individual that understands how complex SOC and IPs are built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be. This role specifically req

Senior ASIC Engineer, Static Timing AnalysisJob Title - Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Remote is an option for right fit Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA

ASIC Implementation EngineerJob Title - ASIC Implementation Engineer

Broadcom CorporationCompany Name - Broadcom Corporation

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San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description: ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and

Senior ASIC Timing EngineerJob Title - Senior ASIC Timing Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in

Senior Reset and Boot ASIC EngineerJob Title - Senior Reset and Boot ASIC Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to pursue, that o

ASIC/RTL Design Engineer - Senior at San Jose, CAJob Title - ASIC/RTL Design Engineer - Senior at San Jose, CA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Contract, Third Party

TOP 3 SKILLS: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Work with verification and p

Senior ASIC Engineer - DFXJob Title - Senior ASIC Engineer - DFX

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success to our people, some of the brightest in the world, and a company culture that fosters and encour

Senior ASIC Design Engineer (eInfochips Inc)Job Title - Senior ASIC Design Engineer (eInfochips Inc)

Arrow Electronics, Inc.Company Name - Arrow Electronics, Inc.

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San Jose, California, USA

Full-time

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology.Option to engage in block-level RTL design or block or top-level IP integration.Collaborate with Software, Design, and Verific

Front-End ASIC Design EngineerJob Title - Front-End ASIC Design Engineer

DBSI ServicesCompany Name - DBSI Services

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Milpitas, California, USA

Full-time

Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description: Responsibilities Include but are not Limited to: Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon

Senior Staff Engineer, ASIC DesignJob Title - Senior Staff Engineer, ASIC Design

Samsung Electronics AmericaCompany Name - Samsung Electronics America

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San Jose, California, USA

Full-time

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

ASIC Engineer, StaffJob Title - ASIC Engineer, Staff

Juniper NetworksCompany Name - Juniper Networks

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Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Juniper is a leading provider of

Senior High-Performance ASIC Timing EngineerJob Title - Senior High-Performance ASIC Timing Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify huma

FPGA/ASIC Validation, Staff EngineerJob Title - FPGA/ASIC Validation, Staff Engineer

Synopsys, Inc.Company Name - Synopsys, Inc.

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Sunnyvale, California, USA

Full-time

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly

Principal Applications Engineer (ASIC/SoC/IP Engineer)Job Title - Principal Applications Engineer (ASIC/SoC/IP Engineer)

Synopsys, Inc.Company Name - Synopsys, Inc.

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Sunnyvale, California, USA

Full-time

Senior ASIC Design Engineer- Emulation (HAPS Engineer)Job Title - Senior ASIC Design Engineer- Emulation (HAPS Engineer)

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Position: Senior ASIC Design Engineer- Emulation (HAPS Engineer) Location: San Jose, CA (Complete onsite) Experience: 8+ years (Relevant) What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Remote

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Menlo Park, CA ASIC Engineer, Design Verification: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification and develop functional tests based on verification test plan. Telecommute from anywhere in the U.S. permitted. (ref. code REQ-2506-152460: $238,228/year - $287,650/year). Individual pay is determined by skills, qualifications, experience, and loca

Senior ASIC Front End Infrastructure EngineerJob Title - Senior ASIC Front End Infrastructure Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Remote or Santa Clara, California, USA

Full-time

NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to artificial intelligence to self-driving cars and supercomputers. Our team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly

Senior ASIC Power EngineerJob Title - Senior ASIC Power Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Santa Clara, California, USA

Full-time

We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: Develop innovative HW, GPU and system

Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)Job Title - Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or King of Prussia, Pennsylvania, USA

Full-time

Job Description We are committed to work-life balance by promoting this hybrid telework opportunity. These job requirements allow the employee to work at a Lockheed Martin-designated office or job site for part of their schedule and has a predefined regular, recurring telework schedule for the remaining part of their work schedule. Who We Are Lockheed Martin is dedicated to shaping, developing, & advancing technologies & capabilities with a focus on our customers' needs as part of our 21st Ce