•Remote or Santa Clara, California, USA
NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on pe