Senior Circuit Design Engineer

"Job Title: Senior Circuit Design Engineer Memory Compiler Lead

Start in 3 weeks from now

Location: Remote

Experience: 8+ years

Overview:

We are looking for a highly skilled Senior Circuit Design Engineer with deep expertise in custom memory IP design and compiler development. The candidate will lead design efforts for advanced SRAM, ROM, and Register File compilers, driving innovation and efficiency across multiple process nodes.

Key Responsibilities:

Lead circuit design and development of memory IPs (SRAM, ROM, RF) and associated compiler architectures.

Define and optimize design methodologies for power, performance, and area (PPA) targets.

Collaborate with layout, characterization, and integration teams to deliver silicon-proven memory IPs.

Architect and enhance memory compiler flows, automation, and design libraries.

Drive design reviews, verification closure, and tape-out readiness.

Mentor and guide junior engineers in circuit and compiler-level design.

Required Skills:

8+ years of experience in custom memory circuit design and compiler development.

Strong expertise in sense amplifiers, bitline/wordline circuits, and periphery design.

Proven experience with compiler automation, parameterization, and generation flows.

Proficiency with Cadence Virtuoso, Spectre, HSPICE, and layout verification tools.

Strong scripting knowledge (Perl/Python/TCL) for design and flow automation.

Excellent understanding of process variation, low-power design, and DFM considerations.

Preferred Qualifications:

Hands-on experience on advanced nodes (e.g., 7nm/5nm/3nm).

Experience leading compiler development for foundries or IP vendors.

Exposure to PDK bring-up and memory characterization."