Overview
On Site
$80 - $100
Contract - W2
Contract - Independent
Contract - 12 Month(s)
Skills
semiconductor design
IO architecture
Job Details
We are seeking a highly experienced Semiconductor Design Engineer with strong expertise in IO architecture, floor-planning, and custom circuit design. The ideal candidate will play a key role in defining and driving chip-level IO design, power-efficient architectures, and packaging/board connectivity for advanced semiconductor solutions.
Responsibilities:
- Perform semiconductor design engineering assignments including chip layout circuits, circuit checking, documentation, and specification development.
- Review product requirements and logic diagrams for device definition.
- Design, fabricate, modify, and evaluate semiconductor devices and components.
- Drive IO definition, clocking, and voltage domain crossing.
- Lead floor-planning and ensure alignment with physical/electrical IO requirements.
- Influence signaling, power rail/bump-patterning, ESD definition, and package/board design.
- Develop custom datapath definitions and power-efficient designs.
- Collaborate with assembly, packaging, and board connectivity teams.
- Conduct weekly project check-ins to align priorities in a dynamic and evolving environment.
Required Skills & Experience:
- 10+ years of semiconductor design experience (8+ years minimum in IO/Architecture).
- Strong background in IO architecture (clocking, voltage domain crossing).
- Expertise in floor-planning, physical packaging, and board/package design.
- Experience with power rail/bump-patterning and ESD requirements.
- Familiarity with DDR/HPM and platform architecture.
- Proficiency in Cadence tools (Virtuoso, Allegro), MOM files.
- Experience developing pioneer circuits and schematic definitions for floor plans.
- Strong cross-functional mindset ability to work across architecture, packaging, and board teams.
Preferred Qualifications:
- System-level architecture exposure.
- Exporting and advanced clocking expertise.
- Proven experience working in dynamic, fast-paced semiconductor programs.
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