Physical Design Engineer

Job Description:

We are seeking a Senior Physical Design Engineer with deep expertise in high-frequency processor implementation to join our team. The ideal candidate will have a strong understanding of physical design flows, hands-on experience with industry-standard tools, and a proven ability to solve complex design challenges. You will be part of a cross-functional team working on cutting-edge semiconductor solutions and responsible for taking designs from RTL to GDSII.

Key Responsibilities:

• Perform full-chip physical design for high-frequency digital processors, including floorplanning, placement, CTS, routing, and timing closure.
• Drive implementation using industry-standard tools to meet power, performance, and area targets.
• Automate design workflows using scripting languages such as Python, Tcl, and SKILL.
• Collaborate closely with RTL, DFT, STA, and packaging teams to ensure successful tape-outs.
• Troubleshoot and resolve design issues across various physical implementation stages.
• Mentor junior engineers and contribute to methodology enhancements and process improvements.

Required Professional and Technical Expertise:

• Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field.
• 5+ years of experience in physical design of high-frequency processors.
• Hands-on expertise with EDA tools for synthesis, place & route, and timing signoff.
• Proficiency in scripting languages (Python, Tcl, SKILL, etc.).
• Strong understanding of complete physical design flows and industry methodologies.
• Excellent verbal and written communication skills.
• Demonstrated experience mentoring peers and collaborating across disciplines.
• Proven ability to innovate and solve complex design problems.

Preferred Qualifications:

• Experience with Cadence tools, including:
• Genus (synthesis)
• Innovus (place & route)
• Tempus (timing signoff)
• Virtuoso (analog/digital integration)
• Knowledge of physical verification and signoff processes.
• Exposure to analog/digital co-design environments.
• Familiarity with Agile developm