Design Verification Engineer

  • Austin, TX
  • Posted 16 hours ago | Updated 16 hours ago

Overview

On Site
Depends on Experience
Accepts corp to corp applications
Contract - W2
Contract - 6 Month(s)

Skills

Collaboration
Communications Management
DV
Debugging
Firmware
Formal Verification
IO

Job Details

We are looking for Design Verification Engineer for our client in Austin, TX
Job Title: Design Verification Engineer
Job Location: Austin, TX
Job Type: Contract
Job Description:
  • The Design Verification Engineer will be responsible for defining verification plans, developing testbenches, and ensuring design quality through simulation and formal verification.
  • The role involves collaboration with cross-functional teams and post-silicon support for debugging and performance improvements.
Responsibilities:
  • Define verification plan and provide technical direction to execution teams.
  • Comprehend AMS, firmware, and design specifications.
  • Collaborate with other functional leads to develop and execute a detailed DV plan.
  • Create UVM/SystemVerilog-based testbenches and tests.
  • Ensure that the design is bug-free.
  • Lead formal verification activities.
  • Support post-silicon teams for product performance, power, and functional issue debugging and resolution.
Should Have:
  • IO/PHY knowledge.
  • Formal verification expertise.
  • Firmware experience.
  • Excellent communication, management, and presentation skills.
  • Strong interpersonal and collaboration skills to work with teams across geographies.
Qualification And Education:
  • Bachelor s or Master s degree in a related discipline preferred.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.