Overview
Skills
Job Details
Note - This is Hybrid role & Candidate can work from any client office across the US, including CA, WA, TX, NY, FL DC VA, GA, TN, MO, NJ, NC, IA, AL & More
Job Description -
Experienced Emulation Engineer of 8 to 10 years, responsible for validating and debugging complex ASIC and IP designs using the Synopsys ZeBu emulation platform. The ideal candidate will have extensive experience in hardware emulation, DV UVM knowledge, a deep understanding of the chip design lifecycle, and strong problem-solving skills to find and fix bugs efficiently.
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Key Responsibilities
Execute DV testcases: Run functional verification tests on the ZeBu emulation platform to find bugs
Debug : Actively participate in functional design verification and in debugging failures.
Collaborate: Coordinate with extended teams to validate and optimize implementation and debug flows.
Analyze and Troubleshoot: Replicate issues and provide detailed analysis to help design teams quickly identify the root cause of failures.
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Required Skills & Experience (must have)
8 to 10 years of total emulation/verification experience, with 2 to 5 years specifically in hardware emulation with Zebu.
DV Experience: Design verification knowledge and experience with UVM/System Verilog
Debugging skills with waves and logs
Experience using zebu platform
Comfortable with C++ code implementation and handling
Proficiency with hardware description languages and methodologies: UVM, SystemVerilog, Verilog, and VHDL.
A solid understanding of the complete SoC design cycle to effectively debug complex IP and system-level issues.
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Good to have
Experience with ARM/Xtensa core toolchain
Scripting (Python)
Knowledge of key protocols like PCIe, USB, Ethernet, AMBA, UART, JTAG, NOC, LPDDR,and flash memories.
Familiarity with debug infrastructures like CoreSight/UltraSoC.
Hands-on experience with bare-metal code for SoC bring-up.