Overview
Remote
Depends on Experience
Accepts corp to corp applications
Contract - W2
Contract - Independent
Contract - 12 Month(s)
No Travel Required
Skills
DDR SDRAM
Electrical Engineering
Electronics
Layout
Problem Solving
calibre
SERDES
Analog Layout Engineer
Job Details
Title: Analog Layout Engineer.
Location: Cupertino, CA or Austin, TX. Consultant is not in Cupertino or Austin , they are open for Remote
Duration: Full Time Or 12+ Months Contract Position.
Technical Skills:
- Technology Nodes: Experience with advanced semiconductor process technologies including 7nm, 5nm, and 16nm nodes
- High-Speed Design: Proficient in High-Speed Layout and design methodologies
- Memory Interfaces: Familiar with DDR (Double Data Rate) memory technologies
- Memory Design: Experience in memory layout and design (possibly referring to "MOMOY" if this was a typo, likely meant "memory")
Education:
- Bachelor s or Master s Degree in Electrical Engineering, Electronics, or a related field
Description:
- Analog Layout req. 4 -8 years ((high speed Serdes, DDR, ADC, DAC, PLL))
- Tech nodes: TSMC 3nm, 5nm, 7nm
- Cadence (Virtuoso), Calibre tool exp. is must
- In this role, you will be responsible for developing Layout with full ownership mode.
- Your duties will include developing schedules and meeting the deadlines throughout the project. You'll be expected to evaluate both intermediate and results during the Layout phase.
General expertise: Need Strong understanding of Analog and Custom Layouts
- Need to have experience in multiple Client Projects
- Good to have Finfet and lower node expertise
- Need to have good attitude and problem-solving skills
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.