Overview
On Site
Hybrid
Depends on Experience
Accepts corp to corp applications
Contract - W2
Contract - Independent
Unable to Provide Sponsorship
Skills
Signal Integrity
LPDDR5X
PCIe Gen7
UCIe (64G)
Job Details
Role: Experienced (>5y) Signal Integrity Engineer to support high-speed interface development and validation. The engineer will work on state-of-the-art technologies such as LPDDR5X, PCIe Gen7, and UCIe (64G).
Responsibilities:
Perform channel modeling, extractions, and eye analysis for high-speed interfaces.
Conduct pre- and post-layout simulations to ensure compliance with interface standards.
Analyze crosstalk, reflections, jitter, and insertion/return loss.
Collaborate with design, package, and PCB teams to optimize SI performance.
Generate reports and recommendations to support design decisions.
Qualifications:
Strong background in signal integrity for high-speed serial and memory interfaces.
Hands-on experience with
oHFSS or Clarity, Siwave or PowerSI,
oSystemSI or ADS or AEDT
Familiarity with JEDEC/LPDDR5/6 and PCIe/UCIe standards.
Strong problem-solving skills and ability to work across cross-functional teams.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.