Director, DRAM Design Rule Engineer

    • Micron Technology, Inc.
  • Boise, ID
  • Posted 25 days ago | Updated 4 hours ago

Overview

On Site
Full Time

Skills

Research and Development
Product engineering
Process integration
Issue resolution
Electrical engineering
Process engineering
Process flow
DRAM
Design
Storage
Transformation
Leadership
Healthcare information technology
Manufacturing
Database
Layout
Management
Data
Communication
Documentation
Mentorship
Physics
Semiconductors
Foundry
Health care
Budget
Recruiting

Job Details

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron has a unique opportunity for a highly experienced DRAM Design Rule Engineer to join our leadership team. As Director - DRAM Design Rule Enablement team , your primary leadership responsibility is to be a catalyst to next-generation DRAM development efforts! We exercise deep knowledge on defining, executing, and coordinating effective actions to enable the project to hit key achievements and timelines. We are pathfinding and groundbreaking DRAM and emerging memory technologies to enrich life. Come innovate with us!

Responsibilities include but are not limited to the following:
  • Coordinate the work of incredible engineers from multiple groups to develop Design Rules, Requirements, Test Structures and improve process margin for all DRAM generations from early development until manufacturing ceases
  • Pro-actively identify and address process issues and process window vs. die size issues stemming from specific database layout or layout techniques
  • Partner with Design, Product Engineering, Process integration, Business Units and Quality groups to optimize PPAC (Performance, Power, Area, Cost) for all Micron DRAM products
  • Assure that the right DRC's (Design Rule Checks) are in place, assure appropriate reaction to deviation from established design rules
  • Strategically partner with multiple teams and fields to understand process issues related to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design
  • Manage effort to build and evaluate test structures to provide data for next generation devices and to quantify process margin on current devices
  • Summarize sophisticated problems, derive and explain actions taken to address them
  • Drive effective multi-functional communication on issue resolution, and support across node Design Rule alignment
  • Define sub-milestones for the project within the layout schedule and work with the various teams to achieve the targets and time-lines
  • Maintain and implement meaningful communication between Process Integration, Product Engineering, Design, and Advanced Mask teams
  • Improve timely documentation of the R&D activities with regard to design rule improvements for transfer to parts still in design
  • Manage, develop, lead, and mentor a group of design rule and design enablement engineers


Minimum Qualifications:
  • MS/PhD in Electrical Engineering, Microelectronics, Physics or related field
  • Demonstrated experience overseeing an engineering team (5+ direct reports)
  • Senior level (10+ years) experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development
  • Solid grasp and exposure to design & layout with the ability to do minor layout, work with Pcells is desired
  • Success in resolving sophisticated issues
  • Think and communicate clearly in urgent and stressful situations
  • Possess a deep understanding of the DRAM process flow, as well as the function and purpose of major DRAM components, such as Sense Amp, Word-line driver, and Anti-Fuse
  • Exposure and familiarity with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle
  • Previous experience in R&D for DRAM is preferred. Other memory technology or logic/foundry experience will be considered.


As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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To learn more about Micron, please visit micron.com/careers

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Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

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