Overview
On Site
USD 108,000.00 - 162,000.00 per year
Full Time
Skills
Static timing analysis
Digital circuit design
Policies and procedures
Circuit design
Electrical engineering
System on a chip
Network
GRID
IMPACT
Automation
ASIC
Design
Scripting
Perl
Python
Tcl
Shell
SPICE
Simulation
UI
RTL
Physics
Debugging
Science
Modeling
Budget
Recruiting
Law
Sales
Job Details
Company:Qualcomm Technologies, Inc.
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
The candidate will be responsible for analyzing the interaction of the SoC power delivery network with static timing analysis on cutting edge tech-node products with advanced power grid structures and evaluating PDN impact on product performance and power. Candidate should have a strong background on power integrity analysis, timing analysis, automation, digital ASIC design flows, and circuit design.
The ideal candidate would possess the following qualifications:
Required qualifications:
Preferred Qualifications:
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$108,000.00 - $162,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer!
If you would like more information about this role, please contact .
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
The candidate will be responsible for analyzing the interaction of the SoC power delivery network with static timing analysis on cutting edge tech-node products with advanced power grid structures and evaluating PDN impact on product performance and power. Candidate should have a strong background on power integrity analysis, timing analysis, automation, digital ASIC design flows, and circuit design.
The ideal candidate would possess the following qualifications:
Required qualifications:
- Bachelor's degree in Electrical Engineering or related field
- Experience with IRdrop analysis tools like Redhawk/RedhawkSC/Voltus
- Basic background of timing analysis concepts and hands-on experience with PTSI/Tempus etc
- Proficient in scripting languages such as Perl or Python, TCL, Shell
- Strong background on power analysis concepts and hands-on experience with PTPX/PowerArtistetc
- Sound conceptual understanding of low power design techniques including voltage/power islands, power gating, clock gating, retention designs etc
- Good understanding of digital circuit design, transistor characteristics, library models, and spice simulation
- Basic knowledge of ASIC frontend/backend flows from RTL to GDSII Basic understanding of device physics and fabrication processes including FINFET and GAA
- Silicon Tape Out and post-silicon debug experience
Preferred Qualifications:
- Master's degree/ PhD in Electrical Science, Engineering
- In-depth knowledge of power delivery modeling, simulation, and characterization for on-die PG and basic understanding of package/board/PMIC power delivery network and PDN budgeting.
- Deep understanding of electrical concepts of RLC behavior
- 2-5 years of professional or academic experience in power grid analysis and hands-on experience on using die-level power integrity analysis tools (Redhawk, RedhawSC, Voltus etc)
- Strong background in timing analysis and hands-on experience with advanced STA solutions from PTSI/Tempus
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$108,000.00 - $162,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer!
If you would like more information about this role, please contact .