Overview
On Site
$60 - $62
Accepts corp to corp applications
Contract - W2
Contract - 1 Month(s)
Able to Provide Sponsorship
Skills
circuit
FPGA
Interfaces
MII
UART
SERDES
USB
Job Details
Job Description: Electrical Test engineer
Work location: Palo Alto, CA.
Electrical Validation, High speed circuit validation, Circuit debugging.
Power PC/ARM/NXP/Intel processors, Microcontrollers, FPGA, CPLD, FLASH, eMMC, DDR 3/4, MII/GMII/SGMII, SERDES, PCI/PCIE Gen1/2/3 ,USB, UART, I2C, SPI, JTAG, GMSL interfaces.
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