Overview
On Site
$180,000 - $210,000
Full Time
No Travel Required
Skills
PMIC IP Verification
DDR5
CMOS
UVM
Job Details
Sr. Verification Engineer Integrated Circuit
Job Duties:
- Performing DDR5 DIMM system-level verification and PMIC IP verification
- Collaborate with component testing verification teams across the company s global sites
- Interface with other engineering functions such as: Design, Product, Spec Engineering
- Develop, drive and implement UVM System Verilog Testbench and infrastructure
- Develop stimulus, coverage, SV assertions, scripts as necessary
- Working with silicon debugging when necessary
- Debugging regressions and failing simulations
- Providing mentorship to junior engineers
Qualifications:
- 5 - 10 years of verification work experience within the integrated circuit industry
- BS or MS in Electrical Engineering, Computer Engineering
- Good understanding of CMOS circuit design
- Strong understanding of DDR5 protocol or CXL 2.0 spec
- Strong understanding and hands-on experience in building UVM Test benches from scratch
- Proficient with digital and analog simulation tools, e.g.: VCS, Xcellieum, Verdi etc.
- Excellent debugging and problem-solving skills
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