Performance Modeling/Verification Engineer - Intermediate

  • Santa Clara, CA
  • Posted 1 day ago | Updated 20 hours ago

Overview

On Site
Depends on Experience
Contract - W2

Skills

Integration Testing
Optimization
Perforce
RTL
SystemC
TLM

Job Details

We are looking for Performance Modeling/Verification Engineer - Intermediate for our client in Santa Clara, CA
Job Title: Performance Modeling/Verification Engineer - Intermediate
Job Location: Santa Clara, CA
Job Type: Contract
Job Description:
Pay Range: $51hr - $58hr
  • The Performance Modeling/Verification Engineer develops, enhances, and maintains SystemC/TLM2 models for memory controllers, peripherals, and interconnects to accurately simulate hardware behavior and performance.
  • The role includes model integration, testing, debugging, optimization, and documentation.
  • The role supports system-level design by creating cycle-approximate performance models, conducting functional and performance verification, identifying bottlenecks, improving model accuracy, and collaborating with cross-functional engineering teams.
Requirement/Must Have:
  • SystemC and TLM2 modeling experience.
  • C and C++ programming proficiency.
  • Understanding of memory controller architectures.
  • UVM verification experience.
  • Debugging experience with complex projects.
  • Ability to work with distributed teams.
  • Knowledge of system-level architecture such as AXI and AHB.
  • Familiarity with version control tools like Perforce or Git.
Experience:
  • 5+ years of recent hands-on SystemC experience.
  • Experience with performance modeling and architecture exploration.
  • Hands-on modeling projects using SystemC.
  • Knowledge of TLM concepts and implementation.
  • Ability to work with C++ integration.
  • Experience with SystemC testbench creation and simulation.
  • Experience modeling at behavioral, RTL, or TLM abstraction levels.
Responsibilities or Duties:
  • Develop, enhance, and maintain SystemC/TLM2 models.
  • Integrate models into internal tools for system-level design.
  • Identify and resolve model bottlenecks and performance issues.
  • Develop and execute testbenches for model validation.
  • Participate in system-level testing and debugging.
  • Create detailed model documentation and usage guidelines.
Should Have:
  • Knowledge of DDR, LPDDR, or similar memory standards.
  • Strong teamwork and collaboration skills.
Skills:
  • SystemC modeling.
  • TLM2 modeling.
  • C and C++ development.
  • Debugging.
  • System-level architecture understanding.
  • Version control proficiency.
Qualification or Education:
  • B.E, M.E, M.Tech, B.S, or M.S in Electrical Engineering or Computer Science.
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