DFT CAD Engineer, Senior

Company:Qualcomm Canada ULC

Job Area:Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Join the CAD team at Qualcomm and advance the industry state of the art for DFT. Support the company-wide deployment of flows architected to enable leading process nodes. Work closely with cross-functional teams from design, production test and yield analysis.

Qualifications

• 3+ years of experience in DFT/DFD/DFX, MS or PhD degree in EE or related field, or equivalent experience
• Core DFT skills for this position include: scan insertion, Memory BIST implementation, JTAG/IJTAG, at-speed test, ATPG, fault simulation, silicon diagnostic, scan compression, IDL/PDL, SSN, SEQ, Core-based test methodology and IO wrapping, pattern retargeting
• Experience developing automation for DFT flow and architecting the DFT methodology.
• Strong coding experience with hands on experience using TCL, Python/Perl, Scripting, and strong analytical debug and problem-solving skills
• Good exposure with industrial DFT tools including Siemens, Synopsys or equivalent
• Deep understanding of SoC design, low power, timing exceptions and complex clock structures
• Strong analytical and debugging experience for ATPG DRC, product manufacturing pattern failures and Design for Debug concept and implementation
• Excellent team spirit, strong ownership and openness, highly motivated

Responsibilities

• Will be part of DFTCAD automation team, developing methodology and flows to support end-2-end DFT/DFX solution, and provide support and training
• Collaborate with SoC design, product and test engineer teams to drive standardization of DFT/ATPG methodology and flow across the company.
• Work closely with multiple EDA tool vendors to resolve day-2-day issues, help to drive vendor solution
• Collect and evaluate requirements with consideration of improving design flow efficiency, test quality and lower test cost to improve DFT flow and methodology

Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to

Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm's toll-free number found for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.

Qualcomm is an equal opportunity employer and supports workforce diversity.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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