Overview
On Site
Depends on Experience
Full Time
Skills
DDR SDRAM
Documentation
IP
ESD
Information Retrieval
Intellectual Property
International Relations
Investor Relations
Layout
Management
Migration
Mixed-signal Integrated Circuit
Project Coordination
Routing
SERDES
RF
Semiconductor
Job Details
Job title: Semiconductor Layout Engineer
Duration: Day1 Onsite (Cupertino, CA & Austin, TX)
Location : 12+ Months
Job Description: Deep knowledge and understanding of the following layout categories:
- Analog/mixed-signal
- power device
- RF/analog layout
- RF transceivers
- low noise, low power data paths
- memory layout
- complex custom digital layout
- layout floor-planning and hierarchical layout assembly
- Knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
- Knowledgeable in layout techniques for device matching, minimizing parasitic, RF shielding, high frequency routing, isolation concepts, crosstalk, electro-migration, IR drop, power routing, and ESD/latch-up
- High degree of understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc
- Basic understanding of circuit design
- Share knowledge of technology risks and opportunities to improve efficiency and effectiveness within the respective process area
- Provide regular and accurate status updates and other documentation to management for assigned project, support, and enhancement work.
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