FPGA Digital Design Engineer

Overview

On Site
Depends on Experience
Contract - W2

Skills

Digital Design
leadership skills
written communication
Field Programmable Gate Array

Job Details

Title : FPGA Digital Design Engineer

Duration : 12+ months

Location : Lafayette, CO

Job Description:

  • This role will be a technical contributor with the focus on digital design of complex Field Programmable Gate Array (FPGA) designs used in space applications.
  • This exciting position will be focused on FPGA design tasks, but may include FPGA verification tasks, depending on the candidate's interest and experience.

Required Skill Sets:

  • BS degree or higher in Electrical Engineering and 4+ years detailed electronics design experience with at least 4 years of FPGA design experience (verification experience is a plus)
  • Experience with design trades, design concept discussions, system specifications, system analyses and failure reporting.
  • Exceptional written communication skills, strong presentation skills and the ability contribute ttechnical group discussions and conversations with customers and team members
  • Engineers where interested in working on a small team of enthusiastic technical experts are encouraged apply. This opportunity includes close mentorship with a technical expert
  • Familiarity with clock domain crossing (CDC) tools and FPGA design pitfalls is nice have.
  • Familiar with AXI based design, DMA, and scripting tools.
  • Experience with interpreting schematics, using schematic capture tools, and digital board design is a plus.
  • Experience with embedded processor-based electronics architecture.
  • Strong interpersonal and self-leadership skills. We have a great team! Blue Canyon values people skills and technical competence working together.
  • Related technical experience may be considered in lieu of education.
  • Desired Skill Sets:
  • Works independently and with limited supervision generate FPGA designs based on detailed design requirements using primarily VHDL
  • Design and verify margin, compliance, and fault robustness of high-speed serial interfaces such as 10 Mb /100Mb/1Gb Ethernet, SpaceWire and LVDS interfaces using simulation methods such as UVM, OVM, or a functional test bench (module and system level)
  • Capture requirements, create state diagrams, timing diagrams, and other design documentation as required by the design process
  • Design robust Finite State Machines (FSMs) and interface logic
  • Generate FPGA test vectors and simulation test benches, executing them in a verification environment such as ModelSim or QuestaSim
  • Develop constraints for and synthesize FPGA designs using Client, Libero, LiberSoC, and Vivadtool suites
  • Capable of chip-level and board-level debug in the lab with a variety of test equipment with supervision as needed
  • Communicates design detail, issues, and concerns effectively in verbal and written form.
  • We value enthusiasm and dedication toward developing highly integrated CubeSat and Blue Canyon Technologies FPGA design solutions and products
  • Other responsibilities as assigned.

Years of Experience Required (if any):

  • 4 or more

Education Level Required:

  • BS or higher