DFX RTL Design Engineer - Specialized (US)

DFX RTL Design Engineer - Specialized (US)
Santa Clara, CA - 95054
6 Months
candidate must be able to come onsite to San Jose, CA 3 days per week

OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes.
This DFX RTL Design Engineer is expected to contribute in :
Implementation of SOC DFT features (TAP controller, GPIOs, ESD structures etc) into RTL using Verilog/system verilog, responsible for all RTL checks including lint/elab/CDC/RDC with 0-waivers, SOC level JTAG/IJTAG implementation (RTL/ICL/PDL), Gate level simulation using Synopsys VCS and Verdi, SOC-level SDC development and hand-off to PD, UPF development and hand-off to PD, Spyglass bringup and analysis for scan readiness/test coverage gaps.
Candidate will also be engaged in silicon bring-up and debug as needed.
Candidate must have a BS in EE or CS. MS is a plus.

Compensation:

The hourly rate for this position is between $80-100 per hour.

Factors which may affect starting pay within this range may include [geography/market, skills, education, experience and other qualifications of the successful candidate].

Benefits:

Sunrise offers ACA compliant medical coverage/dental insurance/vision insurance to all employees. We also offer Sick time benefits as required per State regulations.