Overview
Remote
$60+
Accepts corp to corp applications
Contract - W2
No Travel Required
Skills
UVM
VHDL
SystemVerilog
System On A Chip
Scripting
Integrated Circuit
Perl
ASIC
Job Details
What's the Job?
- Focus on verifying the design of the ASIC/SoC using simulation, formal verification, and emulation.
- Utilize tools like SystemVerilog, UVM, VHDL, and simulation environments to ensure the chip design meets specifications before fabrication.
- Define, document, and implement a UVM verification environment including agents and scoreboards.
- Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes.
- Collaborate with cross-functional teams to ensure thorough verification coverage.
What's Needed?
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of experience in silicon verification, with a strong background in developing and executing verification plans.
- Proficiency in SystemVerilog, UVM, VHDL, and scripting languages such as Python or Perl.
- Strong understanding of digital design principles and computer architecture.
- Excellent attention to detail and problem-solving skills.
What's in it for me?
- Opportunity to work on cutting-edge technology that powers major products.
- Collaborative work environment with cross-functional teams.
- Chance to contribute to the development of verification methodologies and best practices.
- Engagement in both pre-silicon and post-silicon validation processes.
- Professional growth and development in a dynamic industry.
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