Overview
On Site
$120,000 - $140,000
Full Time
Skills
RTL
EDA
VHDL
Synopsys
Job Details
Avanciers Inc. is seeking an experienced RTL Integration Engineer to join one of our premier implementation partners in the dynamic Sunnyvale, CA area. This is a critical, full-time, onsite role offering significant professional growth within a fast-paced, collaborative technology environment.
You will be instrumental in the front-end design flow, focusing on the integration, verification, and quality assurance of complex digital systems using industry-leading tools and methodologies.
What You Will Do
- Execute RTL design and integration tasks for cutting-edge digital hardware subsystems.
- Perform comprehensive digital design verification and ensure seamless subsystem integration.
- Apply expertise in the front-end design flow, including synthesis, linting, and static analysis.
- Utilize and manage industry-standard EDA tools for design, simulation, and timing closure.
- Debug and troubleshoot complex integration and timing issues within RTL designs.
- Implement and maintain quality assurance tools and processes for RTL code integrity.
Required Skills & Qualifications
Technical Expertise
- Proven proficiency in at least one RTL coding language: Verilog, VHDL, or SystemVerilog.
- Hands-on experience with major EDA tools from vendors like Cadence, Synopsys, or Mentor Graphics.
- Familiarity with simulation tools such as ModelSim, VCS, or Xcelium.
- Strong understanding and practical experience with timing analysis and timing closure.
- Experience in RTL integration and large-scale subsystem design.
Education & Soft Skills
- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related technical field.
- Demonstrated problem-solving and analytical skills.
- Excellent communication and documentation skills.
- Ability to prioritize tasks effectively and thrive in a fast-paced, collaborative setting.
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