Overview
On Site
USD 125,000.00 - 200,000.00 per year
Full Time
Skills
ASIC
Semiconductors
Integrated Circuit Design
Cloud Computing
Digital Design
FOCUS
Debugging
Static Timing Analysis
Design Review
Electrical Engineering
Computer Engineering
Computer Hardware
HDL
Verilog
SystemVerilog
Scripting
Tcl
Python
Place And Route
Timing Closure
Synopsys
Power Management
Internal Communications
IC
Integrated Circuit
Layout
Linux
Conflict Resolution
Problem Solving
Attention To Detail
Communication
Collaboration
Teamwork
Management
RTL
Genetics
Authorization
Law
LOS
Recruiting
Job Details
Leading semiconductor manufacturer with competitive compensation, generous bonus, and stock options! Also offering relocation bonus and/or be willing to relocate to Atlanta, GA
This Jobot Job is hosted by: Michael Ramsey
Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.
Salary: $125,000 - $200,000 per year
A bit about us:
Leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets.
This is a great opportunity to work with other global team members to design building blocks for various products as well as an entirely new product for the company! Must be willing to relocate to Atlanta, GA!
Why join us?
Job Details
Job Details:
We are seeking an experienced and dynamic Permanent Digital Design Engineer to join our dynamic engineering team. The ideal candidate will be responsible for designing and implementing cutting-edge digital circuits and systems, with a focus on RTL (Register Transfer Level) design. This is an exciting opportunity to work with a team of passionate engineers who are dedicated to creating innovative solutions that shape the future of the engineering industry.
Responsibilities:
1. Develop RTL designs using hardware description languages (HDL) such as Verilog and SystemVerilog.
2. Utilize scripting languages like TCL and Python to automate and optimize design flows.
3. Perform synthesis, place and route, and timing closure using tools such as Innovis and Synopsys.
4. Conduct RTL design verification using tools like SimVision.
5. Collaborate closely with the team to implement power management IC (PMIC) designs.
6. Work with the team to debug and resolve design and flow issues.
7. Perform static timing analysis and address timing closure issues.
8. Develop and optimize designs for power, performance, and area.
9. Work in a Linux environment and use tools like Virtuoso for custom layout.
10. Participate in design reviews and contribute to the development of specifications and architecture.
11. Collaborate with cross-functional teams to ensure design objectives are met.
Qualifications:
1. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
2. Minimum of 5 years of experience in RTL design and verification.
3. Proficiency in hardware description languages (HDL) such as Verilog and SystemVerilog.
4. Strong experience with scripting languages like TCL and Python.
5. Experience with synthesis, place and route, and timing closure tools such as Innovis and Synopsys.
6. Familiarity with RTL design verification tools like SimVision.
7. Experience with power management IC (PMIC) design.
8. Proficiency in using Virtuoso for custom layout in a Linux environment.
9. Excellent problem-solving skills and attention to detail.
10. Strong communication and teamwork skills.
11. Ability to work independently and manage multiple tasks simultaneously.
12. Proactive attitude and a passion for continuous learning and improvement.
If you are a driven, passionate, and experienced RTL Design Engineer, we would love to hear from you. Apply today and take the next step in your career with us!
Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
This Jobot Job is hosted by: Michael Ramsey
Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.
Salary: $125,000 - $200,000 per year
A bit about us:
Leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets.
This is a great opportunity to work with other global team members to design building blocks for various products as well as an entirely new product for the company! Must be willing to relocate to Atlanta, GA!
Why join us?
- Salary: $125,000 to $200,000
- Annual performance-based bonus (10% to 15%)
- Stock options
- Hybrid work opportunity
- Visa sponsorship and/or relocation bonus as needed
Job Details
Job Details:
We are seeking an experienced and dynamic Permanent Digital Design Engineer to join our dynamic engineering team. The ideal candidate will be responsible for designing and implementing cutting-edge digital circuits and systems, with a focus on RTL (Register Transfer Level) design. This is an exciting opportunity to work with a team of passionate engineers who are dedicated to creating innovative solutions that shape the future of the engineering industry.
Responsibilities:
1. Develop RTL designs using hardware description languages (HDL) such as Verilog and SystemVerilog.
2. Utilize scripting languages like TCL and Python to automate and optimize design flows.
3. Perform synthesis, place and route, and timing closure using tools such as Innovis and Synopsys.
4. Conduct RTL design verification using tools like SimVision.
5. Collaborate closely with the team to implement power management IC (PMIC) designs.
6. Work with the team to debug and resolve design and flow issues.
7. Perform static timing analysis and address timing closure issues.
8. Develop and optimize designs for power, performance, and area.
9. Work in a Linux environment and use tools like Virtuoso for custom layout.
10. Participate in design reviews and contribute to the development of specifications and architecture.
11. Collaborate with cross-functional teams to ensure design objectives are met.
Qualifications:
1. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
2. Minimum of 5 years of experience in RTL design and verification.
3. Proficiency in hardware description languages (HDL) such as Verilog and SystemVerilog.
4. Strong experience with scripting languages like TCL and Python.
5. Experience with synthesis, place and route, and timing closure tools such as Innovis and Synopsys.
6. Familiarity with RTL design verification tools like SimVision.
7. Experience with power management IC (PMIC) design.
8. Proficiency in using Virtuoso for custom layout in a Linux environment.
9. Excellent problem-solving skills and attention to detail.
10. Strong communication and teamwork skills.
11. Ability to work independently and manage multiple tasks simultaneously.
12. Proactive attitude and a passion for continuous learning and improvement.
If you are a driven, passionate, and experienced RTL Design Engineer, we would love to hear from you. Apply today and take the next step in your career with us!
Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.