FPGA Design Engineer (Secret Clearance)

Overview

On Site
$200500
Full Time

Job Details

FPGA Design Engineer – Onsite Role
Locations: Marlborough, MA | Tampa, FL | Carlsbad, CA
Clearance Required: U.S. Citizenship and the ability to obtain and maintain a Secret Clearance
 

A rapidly expanding technology organization is seeking an experienced FPGA Design Engineer to join its team developing next-generation products and services. In this role, you’ll collaborate with high-performing engineering teams in a fast-paced environment and contribute to cutting-edge digital communications solutions.

Key Responsibilities

  • Design module- and system-level FPGA architectures using Verilog and/or VHDL

  • Develop simulations and synthesize designs to FPGA hardware

  • Create and manage timing constraints; analyze timing results and implement required changes

  • Collaborate on design documentation, specifications, and verification protocols

  • Interface with hardware teams, interpret schematics, and bring up boards

  • Conduct code and design reviews; maintain FPGA code revision control

  • Debug and integrate FPGA designs in a lab setting

  • Drive technical issues to resolution independently and as part of a team

Required Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

  • 8+ years of FPGA design experience

  • Strong foundational knowledge of digital logic and timing

  • Proficiency with FPGA EDA tools (e.g., AMD/Xilinx Vivado, Intel Quartus, Synopsys, Siemens/Mentor Graphics)

  • Demonstrated ability to design and implement reusable, scalable modules using Verilog and/or VHDL

  • Strong communication skills and attention to detail

  • Ability to work effectively in both small and large engineering teams

  • U.S. citizenship is required due to clearance eligibility

Preferred Qualifications

  • Master’s degree in Electrical or Computer Engineering

  • Familiarity with scripting languages such as TCL, Perl, or Python

  • Experience with high-speed interfaces (SERDES, DDR, LVDS)

  • Hands-on experience with Linux-based development environments

  • SystemVerilog/UVM or similar advanced verification methodologies

  • Active U.S. Security Clearance needed

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