Performance Modeling and Verification Engineer - Onsite

  • Santa Clara, CA
  • Posted 8 hours ago | Updated 8 hours ago

Overview

On Site
$55.71 - $60.71
Contract - W2
Contract - 6 Month(s)

Skills

SystemC
TLM2
ASIC
ASIC development
software
firmware
hardware
C
C++
Linux
Linux Environment
debug
debug tools
Gdb
Valgrind
Perl
Makefiles
DPI
PLI
PCIe
AXI
Verilog
SystemVerilog
memory controllers
peripherals
interconnects
system design
system testing
system debugging
performance models
performance issues
design specifications
SV
UVM Functional Verification
Performance Verification

Job Details

Title: Performance Modeling and Verification Engineer - Onsite


Mandatory skills:


SystemC, TLM2,
ASIC, ASIC development,
software, firmware, hardware,
C, C++,
Linux, Linux Environment,
debug, debug tools, Gdb, Valgrind,
Perl, Makefiles, DPI, PLI, PCIe, AXI,
Verilog, SystemVerilog, SystemC,
memory controllers, peripherals, interconnects,
system design, system testing, system debugging,
performance models, performance issues, design specifications,
SV, UVM Functional Verification, Performance Verification

Description:


JOB DUTIES:
Develop, enhance, and maintain SystemC/TLM2 models for memory controllers, peripherals, and interconnects, ensuring they accurately simulate the behavior and performance characteristics of the hardware.
Collaborate with cross teams to integrate models into client tools used for system-level designs, ensuring proper functionality and performance.
Identify bottlenecks and performance issues within models and work to optimize their performance to meet design specifications.
Develop and execute testbenches to validate the functionality and correctness of models, as well as participate in system-level testing and debugging.
Create clear and comprehensive documentation for models, including usage guidelines and design specifications.

Deliverables:
Cycle approximate performance models
SV/UVM Functional and Performance Verification

EXPERIENCE AND EDUCATION:
5 or more years of proven modeling & verification experience on large ASIC development projects or software/firmware experience in a hardware development setting; Strong background in C/C++ development in a Linux Environment; Strong debug skills and experience with debug tools such as Gdb, Valgrind ;Knowledge of Perl and Makefiles; Experience in Verilog/SystemVerilog/SystemC, preferred; Experience in C/Verilog environment using DPI/PLI, preferred; Strong analytical skills and attention to detail; Excellent written and communication skills; PCIe & AXI Knowledge Preferred


VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at for any complaints, comments and suggestions.


Contact Details :

VIVA USA INC.
3601 Algonquin Road, Suite 425
Rolling Meadows, IL 60008

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About VIVA USA INC