Overview
On Site
Contract - W2
Skills
ASIC
Management
Test Plans
Collaboration
Product QA
Verilog
Mixed-signal Integrated Circuit
Cadence Virtuoso
AFS
calibre
CMOS
Layout
ESD
Circuit Analysis
Physics
Analog Circuits
Communication
Mentorship
Electrical Engineering
Job Details
Our client is seeking a Senior Mixed-Signal ASIC Design Engineer to join a dynamic team working on next-generation integrated circuits for high-performance communication and data center applications.
Responsibilities:
Hybrid - United States
Responsibilities:
- Design and simulate high-resolution data converters (DACs/ADCs) and low-power analog circuits such as bandgap references, opamps, and output buffers.
- Develop layout floorplans, supervise layout activities, and provide clear guidance to layout engineers (hands-on layout work may be required).
- Create analog test plans and collaborate with product/test engineering teams for characterization and validation.
- Follow established design methodologies and release processes to ensure product quality and consistency.
- Model circuit behavior using Verilog-A/AMS for design verification.
- Strong expertise with analog/mixed-signal design tools (Cadence Virtuoso, Spectre, Layout XL, Mentor AFS, Calibre).
- Proven experience in taking data converters from design to production.
- In-depth understanding of CMOS and high-voltage (BCD) design, layout effects, and ESD protection.
- Skilled in circuit analysis, device physics, and analog design methodology.
- Excellent communication skills and ability to work effectively in cross-functional, distributed teams.
- Capable of mentoring junior engineers and independently resolving complex design challenges.
- Staff Design Engineer: M.S. in Electrical Engineering with 8+ years of experience or Ph.D. with 8+ years.
- Principal Design Engineer: M.S. with 12+ years or Ph.D. with 12+ years of experience.
Hybrid - United States
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