Package Designer

About Us

Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up and spec to product. With 3200+ employees worldwide, Tessolve delivers a one-stop solution with advanced silicon and system testing labs.

We offer Turnkey ASIC Solutions from design to packaged parts, leveraging strong ecosystem partnerships with EDA, IP, and foundry vendors. Our integrated front-end and backend expertise reduces design risks and accelerates time-to-market.

Our R&D centers of excellence focus on emerging technologies such as 5G, mmWave, Silicon Photonics, HSIO, HBM/HPI, and System-Level Test. Tessolve also delivers end-to-end embedded product design services under an ODM model for Avionics, Automotive, Industrial, and Medical applications.

Tessolve s clientele includes 9 of the top 10 semiconductor companies, along with Tier-1 clients, start-ups, and government entities. We have a global presence in 12+ countries, with advanced test labs in India, Singapore, Malaysia, Austin, and San Jose.

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We are looking for an experienced packaging designer to develop creative and cost-effective packaging designs.

JOB DESCRIPTION

• Netlist creation, BGA creation as per the inputs
• Conduct feasibility studies to advise optimum pad layout, interconnect types and substrate parameters for a specific IC device or application.
• Define substrate stack-ups, routing strategies and via structures.
• Substrate design experience for RF, digital, high-speed and mixed signal die
• Excellent understanding of SI/PI requirement for routing HSIO (DDR, SERDES, etc).
• Good experience in UCIE-Advanced and Standard technology, HBM technology.
• Experience in setting design rule checks (DRC) to ensure layouts meet specific manufacturing, Assembly and design guidelines.
• Experience of optimise the die breakout for signals and create patterns for High power.
• Strong understanding of HDI substrate technologies, layout design rules, and materials for optimal performance. Verify designs against electrical, thermal, mechanical, and manufacturability requirements.
• Knowledge on different Package types.
• Experience in Wire bond, Flip chip Substrate designs.
• Hands on experience with Wire bond, Flip chip & advanced packaging technologies (2.5D, 3D, RDL, embedded passives, etc.)
• Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS.
• Knowledge of different OSAT design rules

QUALIFICATION :

• Bachelor s degree in Electronics /Electrical Engineering,
• 3 to 8+ years in IC package design and development.
• Proficiency with Cadence Allegro Package Designer.

Why Tessolve

Join a global semiconductor solutions leader, where you ll work on cutting-edge packaging design projects across advanced technologies, collaborate with world-class engineering teams, and help shape the future of semiconductor innovation.

Equal Opportunity Employer

Tessolve is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, age, disability, veteran status, or any other protected characteristic.