Overview
Skills
Job Details
Role: FPGA Validation Engineer
Location: Santa Clara, CA (Onsite)
5 to 8 years of experience
Experienced in Verilog and VHDL proficiency, FPGA synthesis tools (Xilinx Vivado, Intel Quartus).
Signal processing algorithms and Embedded systems programming.
Deep understanding of digital logic design and computer architecture
FPGA simulation tools (ModelSim, VCS).
High speed communication protocols validation (e.g., DDR, HDMI, PCIe, Ethernet).
FPGA verification methodologies
Test case coding in Verilog/ System Verilog.
Simulation Environment development and maintenance.
Code Coverage analysis
Assertions development and Assertion Based Verification
Development of software models in high level languages like Python, C
Support the development team in hardware debugging