Overview
On Site
BASED ON EXPERIENCE
Full Time
Contract - W2
Contract - Independent
Contract - 12+ mo(s)
Skills
FPGA DESIGN ENGINEER
RTL DESIGN ENGINEER
HARDWARE DESIGN ENGINEER
DIGITAL DESIGN ENGINEER
FPGA DEVELOPER
ASIC DESIGN ENGINEER
AMBA AXI
AXI
ARM PROCESSOR
C PROCESSOR
SOC
SYSTEM ON CHIP
ARTERIS
ARTERIS IP
NETWORK-ON-CHIP
NOC
PYTHON
TCL
SHELL SCRIPT
SCRIPTING
WINDOWS
LINUX
HAL
HARDWARE ABSTRACTION LAYER
SPI
I2C
MIPI
DSI
CSI
Job Details
Job Title: Senior FPGA/RTL Design Engineer
Location: Remote
Contract: 12+ Months
What You'll Be Doing:
Strong expertise on Arteris Design Toolset
At-least 5+ years of experience in Verilog Design
AMBA AXI bus along-with ARM or C based processor
Ensure customer satisfaction.
Reporting to customers on daily or weekly progress effectively.
What We Are Looking For:
Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
Develop and maintain build/simulation scripts
Write test cases using Python to validate our design
Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
Collaborate in a team environment across multiple engineering disciplines and with researchers.
5+ years of FPGA design experience using Verilog, SystemVerilog
5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages.
10+ years of experience in FPGA design and development
Experience with RTL to GDS flows on modern processes like TSMC N7
Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
Programming experience in C and/or C++
Experience developing accompanying firmware to exercise and drive FPGA prototypes
Location: Remote
Contract: 12+ Months
What You'll Be Doing:
Strong expertise on Arteris Design Toolset
At-least 5+ years of experience in Verilog Design
AMBA AXI bus along-with ARM or C based processor
Ensure customer satisfaction.
Reporting to customers on daily or weekly progress effectively.
What We Are Looking For:
Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred)
Develop and maintain build/simulation scripts
Write test cases using Python to validate our design
Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer
Collaborate in a team environment across multiple engineering disciplines and with researchers.
5+ years of FPGA design experience using Verilog, SystemVerilog
5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum)
Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design
Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages.
10+ years of experience in FPGA design and development
Experience with RTL to GDS flows on modern processes like TSMC N7
Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI
Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
Programming experience in C and/or C++
Experience developing accompanying firmware to exercise and drive FPGA prototypes
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.